From 8cf0c0c27fb1a4a3a70ae06302084b74a25d1c5e Mon Sep 17 00:00:00 2001
From: hadaq <hadaq>
Date: Wed, 6 Jun 2012 21:57:33 +0000
Subject: [PATCH] LM: added register_write_mem function

---
 libtrbnet_perl/TrbNet.xs           | 30 ++++++++++++++++++++++++++++--
 libtrbnet_perl/lib/HADES/TrbNet.pm |  1 +
 2 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/libtrbnet_perl/TrbNet.xs b/libtrbnet_perl/TrbNet.xs
index 53e8bb6..25205e9 100644
--- a/libtrbnet_perl/TrbNet.xs
+++ b/libtrbnet_perl/TrbNet.xs
@@ -129,13 +129,39 @@ trb_register_write(trb_address, reg_address, value)
        int status;
        
      PPCODE:
-       status = trb_register_write(trb_address,reg_address, value);
+       status = trb_register_write(trb_address, reg_address, value);
        if (status < 0) {
           XSRETURN_UNDEF;
        } else {
           XPUSHs(sv_2mortal(newSVuv(1))); 
        }
 
+void
+trb_register_write_mem(trb_address, reg_address, option, data, size)
+       U16 trb_address
+       U16 reg_address 
+       U16 option
+       AV * data
+       U16 size
+     INIT:
+       int i;
+       int status;
+       
+     PPCODE:
+       for (i = 0; i < size; i++) {
+         buffer[i] = SvUV(*av_fetch(data, i, 0));
+       }
+
+       status = trb_register_write_mem(trb_address, reg_address,
+                                       option, buffer, size);
+       
+       printf("Status: %d\n", status);
+       if (status < 0) {
+         XSRETURN_UNDEF;
+       } else {
+         XPUSHs(sv_2mortal(newSVuv(1)));
+       }
+
 void
 trb_read_uid_c(trb_address)
        U16 trb_address
@@ -185,4 +211,4 @@ trb_register_modify(trb_address, reg_address, mode, bitMask, bitValue)
        XSRETURN_UNDEF;
      } else {
        XPUSHs(sv_2mortal(newSVuv(1)));
-     }
\ No newline at end of file
+     }
diff --git a/libtrbnet_perl/lib/HADES/TrbNet.pm b/libtrbnet_perl/lib/HADES/TrbNet.pm
index bffa53e..387f984 100644
--- a/libtrbnet_perl/lib/HADES/TrbNet.pm
+++ b/libtrbnet_perl/lib/HADES/TrbNet.pm
@@ -30,6 +30,7 @@ our %EXPORT_TAGS = ( 'all' => [ qw(
 				    trb_register_read_mem_c
 				    trb_registertime_read_mem_c
 				    trb_register_write
+				    trb_register_write_mem
 				    trb_read_uid
 				    trb_read_uid_c
 				    trb_nettrace
-- 
2.43.0