From 8db34601c147a5204d6539464ad22dccf320f7db Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Fri, 7 Mar 2008 17:09:38 +0000 Subject: [PATCH] *** empty log message *** --- trb_net16_api_base.vhd | 2 +- xilinx/virtex2/xilinx_fifo_dualport_18x1k.xco | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/trb_net16_api_base.vhd b/trb_net16_api_base.vhd index a4954d2..3e70ffa 100644 --- a/trb_net16_api_base.vhd +++ b/trb_net16_api_base.vhd @@ -687,7 +687,7 @@ begin next_state_to_apl <= sa_IDLE; end if; elsif API_TYPE = 1 then - if state_to_int /= IDLE then + if master_start = '1' then next_state_to_apl <= sa_IDLE; end if; end if; diff --git a/xilinx/virtex2/xilinx_fifo_dualport_18x1k.xco b/xilinx/virtex2/xilinx_fifo_dualport_18x1k.xco index c63d98f..964c002 100644 --- a/xilinx/virtex2/xilinx_fifo_dualport_18x1k.xco +++ b/xilinx/virtex2/xilinx_fifo_dualport_18x1k.xco @@ -2,7 +2,7 @@ SET flowvendor = Foundation_iSE SET vhdlsim = True SET verilogsim = True -SET workingdirectory = /d/jspc22/trb/ot_trb/ise8 +SET workingdirectory = . SET speedgrade = -5 SET simulationfiles = Behavioral SET asysymbol = True -- 2.43.0