From 92237b75bdf739aeb7d596ca995c65be2512457d Mon Sep 17 00:00:00 2001 From: Andreas Neiser Date: Wed, 16 Jul 2014 10:04:01 +0200 Subject: [PATCH] ADC: Keeping the ADC SPI pins low (also PULLMODE=DOWN), prevent entering power on test mode --- ADC/trb3_periph_adc.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ADC/trb3_periph_adc.vhd b/ADC/trb3_periph_adc.vhd index a1d3b8a..b27583a 100644 --- a/ADC/trb3_periph_adc.vhd +++ b/ADC/trb3_periph_adc.vhd @@ -585,7 +585,7 @@ THE_SPI_RELOAD : entity work.spi_flash_and_fpga_reload FPGA_SDI(0) <= spi_SDO when spi_CS(2 downto 0) /= b"111" else '0'; spi_SDI <= FPGA_SDO(0) when spi_CS(2 downto 0) /= b"111" else '0'; - SPI_ADC_SCK <= spi_SCK when spi_CS(3) = '0' else '1'; + SPI_ADC_SCK <= spi_SCK when spi_CS(3) = '0' else '0'; SPI_ADC_SDIO <= spi_SDO when spi_CS(3) = '0' else '0'; LMK_CLK <= spi_SCK when spi_CS(5 downto 4) /= b"11" else '1' ; -- 2.43.0