From 92c5ac7d92ece2259960ef6c509e6d72d9eaea23 Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Thu, 25 Oct 2007 13:44:18 +0000 Subject: [PATCH] first 16Bit hardware tests finished, Jan --- testbench/trb_net16_dummy_passive_apl.vhd | 8 ++++-- trb_net16_apimbuf.vhd | 24 +++++++++++++----- trb_net16_io_multiplexer.vhd | 9 +++---- trb_net16_obuf.vhd | 2 +- trb_net_med_8bit_slow.vhd | 30 ++++++++++++++++------- xilinx/trb_net_fifo_arch.vhd | 4 +-- 6 files changed, 51 insertions(+), 26 deletions(-) diff --git a/testbench/trb_net16_dummy_passive_apl.vhd b/testbench/trb_net16_dummy_passive_apl.vhd index 320ff89..5acfb7a 100644 --- a/testbench/trb_net16_dummy_passive_apl.vhd +++ b/testbench/trb_net16_dummy_passive_apl.vhd @@ -45,7 +45,8 @@ entity trb_net16_dummy_passive_apl is -- APL Control port APL_RUN_IN: in std_logic; -- Data transfer is running -- APL_MY_ADDRESS_OUT: in std_logic_vector (15 downto 0); -- My own address (temporary solution!!!) - APL_SEQNR_IN: in std_logic_vector (7 downto 0) + APL_SEQNR_IN: in std_logic_vector (7 downto 0); + STAT : out std_logic_vector(31 downto 0) ); end entity; @@ -64,7 +65,7 @@ architecture trb_net16_dummy_passive_apl_arch of trb_net16_dummy_passive_apl is begin APL_READ_OUT <= '1'; --just read, do not check - APL_DTYPE_OUT <= x"1"; + APL_DTYPE_OUT <= x"0"; APL_ERROR_PATTERN_OUT <= x"12345678"; APL_TARGET_ADDRESS_OUT <= TARGET_ADDRESS; --APL_DATA_OUT <= reg_counter; @@ -88,6 +89,9 @@ begin end case; end process; + STAT(2 downto 0) <= state_bits; + STAT(8) <= '1' when current_TYPE_IN = TYPE_TRM else '0'; + --this holds the current packet type from fifo_to_apl process(CLK) begin diff --git a/trb_net16_apimbuf.vhd b/trb_net16_apimbuf.vhd index e2ce1c7..195035e 100644 --- a/trb_net16_apimbuf.vhd +++ b/trb_net16_apimbuf.vhd @@ -355,6 +355,9 @@ signal m_DATA_IN : std_logic_vector (DATA_WIDTH*2**MUX_WIDTH-1 downto 0); signal m_PACKET_NUM_IN : std_logic_vector (NUM_WIDTH*2**MUX_WIDTH-1 downto 0); signal m_READ_OUT : std_logic_vector (2**MUX_WIDTH-1 downto 0); +signal buf_STAT_INIT_BUFFER : std_logic_vector (31 downto 0); +signal buf_api_stat_fifo_to_apl, buf_api_stat_fifo_to_int : std_logic_vector (31 downto 0); + begin --Connections for data channel @@ -459,8 +462,8 @@ begin INT_SLAVE_PACKET_NUM_IN=> buf_to_apl_REPLY_PACKET_NUM, INT_SLAVE_READ_OUT => buf_to_apl_REPLY_READ, -- Status and control port - STAT_FIFO_TO_INT => api_stat_fifo_to_int, - STAT_FIFO_TO_APL => api_stat_fifo_to_apl + STAT_FIFO_TO_INT => buf_api_stat_fifo_to_int, + STAT_FIFO_TO_APL => buf_api_stat_fifo_to_apl ); end generate; @@ -517,10 +520,12 @@ begin INT_SLAVE_PACKET_NUM_IN=> buf_to_apl_INIT_PACKET_NUM, INT_SLAVE_READ_OUT => buf_to_apl_INIT_READ, -- Status and control port - STAT_FIFO_TO_INT => api_stat_fifo_to_int, - STAT_FIFO_TO_APL => api_stat_fifo_to_apl + STAT_FIFO_TO_INT => buf_api_stat_fifo_to_int, + STAT_FIFO_TO_APL => buf_api_stat_fifo_to_apl ); end generate; +api_stat_fifo_to_apl <= buf_api_stat_fifo_to_apl; +api_stat_fifo_to_int <= buf_api_stat_fifo_to_int; STAT_api_control_signals(2 downto 0) <= APL_DATA_IN(2 downto 0); STAT_api_control_signals(3) <= APL_WRITE_IN; @@ -529,8 +534,13 @@ STAT_api_control_signals(7 downto 5) <= (others => '0'); STAT_api_control_signals(10 downto 8) <= apl_to_buf_INIT_DATA(2 downto 0); STAT_api_control_signals(11) <= apl_to_buf_INIT_DATAREADY; STAT_api_control_signals(12) <= apl_to_buf_INIT_READ; -STAT_api_control_signals(31 downto 13) <= (others => '0'); +STAT_api_control_signals(28 downto 13) <= (others => '0'); +STAT_api_control_signals(31) <= buf_to_apl_INIT_READ; +--STAT_api_control_signals(30) <= buf_to_apl_INIT_PACKET_NUM(0); +--STAT_api_control_signals(29) <= buf_to_apl_INIT_DATAREADY; +STAT_api_control_signals(30) <= buf_api_stat_fifo_to_apl(3); +STAT_api_control_signals(29) <= buf_api_stat_fifo_to_apl(14); IOBUF: trb_net16_iobuf @@ -592,7 +602,7 @@ IOBUF: trb_net16_iobuf -- Status and control port STAT_GEN => STAT_GEN, STAT_LOCKED => STAT_LOCKED, - STAT_INIT_BUFFER => STAT_INIT_BUFFER, + STAT_INIT_BUFFER => buf_STAT_INIT_BUFFER, STAT_REPLY_BUFFER => STAT_REPLY_BUFFER, CTRL_GEN => CTRL_GEN, CTRL_LOCKED => CTRL_LOCKED, @@ -600,6 +610,8 @@ IOBUF: trb_net16_iobuf STAT_CTRL_REPLY_BUFFER => STAT_CTRL_REPLY_BUFFER ); +STAT_INIT_BUFFER <= buf_STAT_INIT_BUFFER; + MPLEX: trb_net16_io_multiplexer generic map ( DATA_WIDTH => DATA_WIDTH, diff --git a/trb_net16_io_multiplexer.vhd b/trb_net16_io_multiplexer.vhd index 60b04cb..8e5c7e6 100644 --- a/trb_net16_io_multiplexer.vhd +++ b/trb_net16_io_multiplexer.vhd @@ -196,6 +196,7 @@ architecture trb_net16_io_multiplexer_arch of trb_net16_io_multiplexer is INPUT_IN => MED_DATA_IN(3+MUX_WIDTH-1 downto 3), RESULT_OUT => next_demux_dr_tmp -- this will have a 1 in ANY case ); + keep_valid_demux : process(CLK) begin if rising_edge(CLK) then @@ -203,8 +204,6 @@ architecture trb_net16_io_multiplexer_arch of trb_net16_io_multiplexer is demux_dr_tmp <= (others => '0'); elsif current_MED_READ_OUT = '1' and MED_DATAREADY_IN = '1' and MED_PACKET_NUM_IN = "00" then demux_dr_tmp <= next_demux_dr_tmp; - else - demux_dr_tmp <= demux_dr_tmp; end if; end if; end process; @@ -217,8 +216,6 @@ architecture trb_net16_io_multiplexer_arch of trb_net16_io_multiplexer is current_MED_READ_OUT <= '0'; elsif CLK_EN = '1' then current_MED_READ_OUT <= next_MED_READ_OUT; - else - current_MED_READ_OUT <= current_MED_READ_OUT; end if; end if; end process; @@ -242,7 +239,7 @@ ARBITER: trb_net_priority_arbiter -- we have to care to read four packets from every endpoint - process(current_mux_buffer, mux_read, endpoint_locked) + process(current_mux_buffer, mux_read, endpoint_locked, current_mux_packet_number) begin next_endpoint_locked <= endpoint_locked; if current_mux_packet_number = "11" and mux_read = '1' then @@ -274,7 +271,7 @@ ARBITER: trb_net_priority_arbiter end if; end process; - process(tmp_INT_READ_OUT, endpoint_locked, final_INT_READ_OUT) + process(tmp_INT_READ_OUT, endpoint_locked, final_INT_READ_OUT, last_mux_enable) begin if endpoint_locked = '0' then current_INT_READ_OUT <= tmp_INT_READ_OUT; diff --git a/trb_net16_obuf.vhd b/trb_net16_obuf.vhd index 1c27a78..ade5d12 100644 --- a/trb_net16_obuf.vhd +++ b/trb_net16_obuf.vhd @@ -187,7 +187,7 @@ begin reg_INT_READ_OUT, reg_SEND_ACK_IN, saved_packet_type, current_DATA_word, send_ACK, send_EOB, sbuf_free, current_ACK_word, current_EOB_word, - next_TRANSMITTED_BUFFERS) + next_TRANSMITTED_BUFFERS, TRANSMITTED_BUFFERS, send_DATA) begin current_output_data_buffer <= current_NOP_word; diff --git a/trb_net_med_8bit_slow.vhd b/trb_net_med_8bit_slow.vhd index cab45c0..3fb31d0 100644 --- a/trb_net_med_8bit_slow.vhd +++ b/trb_net_med_8bit_slow.vhd @@ -106,13 +106,20 @@ begin INT_DATAREADY_OUT <= buf_INT_DATAREADY_OUT; INT_DATA_OUT <= buf_INT_DATA_OUT; INT_PACKET_NUM_OUT <= buf_INT_PACKET_NUM_OUT; -INT_ERROR_OUT <= my_error; +INT_ERROR_OUT <= "000";--my_error; INT_READ_OUT <= buf_INT_READ_OUT; STAT <= buf_STAT; MED_DATA_OUT(7 downto 0) <= buf_MED_DATA_OUT; -MED_DATA_OUT(10 downto 8) <= (others => '0'); -MED_DATA_OUT(11) <= '1'; +--MED_DATA_OUT(10 downto 8) <= recv_counter; + +-- MED_DATA_OUT(8) <= buf_INT_DATAREADY_OUT; +-- MED_DATA_OUT(9) <= INT_READ_IN; +-- MED_DATA_OUT(10)<= buf_INT_PACKET_NUM_OUT(0); +MED_DATA_OUT(10 downto 8) <= buf_INT_DATA_OUT(2 downto 0); + + +MED_DATA_OUT(11) <= not reset; MED_DATA_OUT(12) <= buf_MED_FIRST_PACKET_OUT; MED_DATA_OUT(13) <= buf_MED_TRANSMISSION_CLK_OUT; MED_DATA_OUT(14) <= buf_MED_CARRIER_OUT; @@ -142,10 +149,10 @@ CTRL_reg: process (CLK,RESET) --My error bits -------------------------------- -gen_my_error: process(media_not_connected,fatal_error) +gen_my_error: process(media_not_connected,fatal_error, MED_DATA_IN) begin - if media_not_connected = '1' then - next_my_error <= "100"; + if media_not_connected = '1' or MED_DATA_IN(11) = '0' then + next_my_error <= ERROR_NC; elsif fatal_error = '1' then next_my_error <= "011"; else @@ -239,7 +246,8 @@ transCLK_counter: process (this_TRCLK, last_TRCLK, CLK_counter, -------------------------------- INT2MED_fsm: process(buf_MED_DATA_OUT, buf_MED_CARRIER_OUT, buf_MED_PARITY_OUT, buf_INT_DATA_IN, transmission_running, buf_MED_FIRST_PACKET_OUT, next_TRANSMISSION_CLK, - buf_MED_TRANSMISSION_CLK_OUT, INT_DATAREADY_IN, INT_DATA_IN) + buf_MED_TRANSMISSION_CLK_OUT, INT_DATAREADY_IN, INT_DATA_IN, + buf_INT_READ_OUT, INT_PACKET_NUM_IN) begin next_buf_MED_DATA_OUT <= buf_MED_DATA_OUT; next_MED_CARRIER_OUT <= buf_MED_CARRIER_OUT; @@ -257,6 +265,7 @@ begin next_buf_MED_DATA_OUT <= INT_DATA_IN(15 downto 8); next_buf_INT_DATA_IN <= INT_DATA_IN(7 downto 0); next_MED_CARRIER_OUT <= '1'; + next_MED_PARITY_OUT <= xor_all(INT_DATA_IN(15 downto 8)); next_transmission_running <= '1'; buf_INT_READ_OUT <= '1'; if INT_PACKET_NUM_IN = "00" then @@ -268,6 +277,7 @@ begin elsif transmission_running = '1' then if next_TRANSMISSION_CLK = '0' and buf_MED_TRANSMISSION_CLK_OUT = '1' then next_buf_MED_DATA_OUT <= buf_INT_DATA_IN; + next_MED_PARITY_OUT <= xor_all(buf_INT_DATA_IN); next_transmission_running <= '0'; end if; end if; @@ -325,13 +335,15 @@ INT2MED_fsm_reg: process(CLK,RESET) MED2INT_fsm: process(buf_INT_DATA_OUT, buf_INT_DATAREADY_OUT, buf_MED_DATA_IN, last_MED_TRANSMISSION_CLK_IN, - reg_MED_TRANSMISSION_CLK_IN, reg_MED_DATA_IN, recv_counter, INT_READ_IN) + reg_MED_TRANSMISSION_CLK_IN, reg_MED_DATA_IN, recv_counter, INT_READ_IN, reg_MED_CARRIER_IN, + buf_INT_PACKET_NUM_OUT) begin next_INT_DATA_OUT <= buf_INT_DATA_OUT; next_INT_DATAREADY_OUT <= buf_INT_DATAREADY_OUT; next_buf_MED_DATA_IN <= buf_MED_DATA_IN; + next_INT_PACKET_NUM_OUT <= buf_INT_PACKET_NUM_OUT; - if last_MED_TRANSMISSION_CLK_IN = '0' and reg_MED_TRANSMISSION_CLK_IN = '1' then + if reg_MED_CARRIER_IN = '1' and last_MED_TRANSMISSION_CLK_IN = '0' and reg_MED_TRANSMISSION_CLK_IN = '1' then if recv_counter(0) = '1' then next_buf_MED_DATA_IN <= reg_MED_DATA_IN; else diff --git a/xilinx/trb_net_fifo_arch.vhd b/xilinx/trb_net_fifo_arch.vhd index 289c234..fae5060 100644 --- a/xilinx/trb_net_fifo_arch.vhd +++ b/xilinx/trb_net_fifo_arch.vhd @@ -168,10 +168,10 @@ begin -- 3 -> 16 CHECK_DEPTH1: if DEPTH>=3 generate DEPTH_OUT <= std_logic_vector(to_unsigned(DEPTH,8)); - end generate CHECK_DEPTH1; + end generate; CHECK_DEPTH2: if DEPTH<3 generate DEPTH_OUT <= x"03"; - end generate CHECK_DEPTH2; + end generate; end generate; -- 2.43.0