From 95e8da3c6a7918917b1ecc9baca8c8e26cd391fe Mon Sep 17 00:00:00 2001 From: Rene Hagdorn Date: Fri, 27 Apr 2018 11:07:18 +0200 Subject: [PATCH] Minor clean-up --- mupix/Mupix8/sources/Generator3.vhd | 10 +++++----- mupix/Mupix8/sources/MupixBoard.vhd | 9 ++++----- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/mupix/Mupix8/sources/Generator3.vhd b/mupix/Mupix8/sources/Generator3.vhd index 078ea5e..1a2332d 100644 --- a/mupix/Mupix8/sources/Generator3.vhd +++ b/mupix/Mupix8/sources/Generator3.vhd @@ -76,11 +76,11 @@ begin when gen => if unsigned(data_num) > 0 then - pause_ctr <= (others => '0'); - down_ctr <= (others => '0'); --- data_int <= data_int + 1; - writeEn_int <= '1'; - num_ctr <= num_ctr + 1; + pause_ctr <= (others => '0'); + down_ctr <= (others => '0'); +-- data_int <= data_int + 1; + writeEn_int <= '1'; + num_ctr <= num_ctr + 1; if num_ctr < unsigned(data_num) - 1 then data_fsm <= pause; else diff --git a/mupix/Mupix8/sources/MupixBoard.vhd b/mupix/Mupix8/sources/MupixBoard.vhd index bc27cd4..7dc00a0 100644 --- a/mupix/Mupix8/sources/MupixBoard.vhd +++ b/mupix/Mupix8/sources/MupixBoard.vhd @@ -224,8 +224,6 @@ architecture Behavioral of MupixBoard8 is SLV_UNKNOWN_ADDR_OUT : out std_logic ); end component MupixTRBReadout; - - signal in_rden : std_logic_vector(3 downto 0); component TriggerHandler port( @@ -295,6 +293,7 @@ architecture Behavioral of MupixBoard8 is signal mux_fifo_data : std_logic_vector(127 downto 0); signal mux_fifo_full : std_logic_vector(3 downto 0); signal mux_fifo_empty : std_logic_vector(3 downto 0); + signal mux_fifo_rden : std_logic_vector(3 downto 0); --signal declarations -- Bus Handler @@ -498,7 +497,7 @@ begin -- Behavioral fifo_empty => mux_fifo_empty, fifo_full => mux_fifo_full, fifo_datain => mux_fifo_data, - fifo_rden => in_rden, + fifo_rden => mux_fifo_rden, trb_trigger => trb_trigger_i, dataout => mupixdata_i, data_valid => mupixdata_valid_i, @@ -552,13 +551,13 @@ begin -- Behavioral DATAWIDTH => DATA_WIDTH ) port map( - clk => clk + clk => clk, reset => reset, serdes_data => fifo_data, serdes_fifo_full => fifo_full, serdes_fifo_empty => fifo_empty, serdes_fifo_rden => fifo_rden, - in_rden => in_rden, + in_rden => mux_fifo_rden, out_data => mux_fifo_data, out_fifo_full => mux_fifo_full, out_fifo_empty => mux_fifo_empty, -- 2.43.0