From 9e0c8b5ee4a2dc4914c3aa9c42f8e9fe46301874 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Fri, 19 Jul 2013 17:18:13 +0200 Subject: [PATCH] writeram via libtrbnet for debugging --- soft/toolbox/jtag_atomic/ui_writeram.pl | 54 ++++++++++++++++++------- 1 file changed, 40 insertions(+), 14 deletions(-) diff --git a/soft/toolbox/jtag_atomic/ui_writeram.pl b/soft/toolbox/jtag_atomic/ui_writeram.pl index fc94786..dfde2dc 100755 --- a/soft/toolbox/jtag_atomic/ui_writeram.pl +++ b/soft/toolbox/jtag_atomic/ui_writeram.pl @@ -12,6 +12,7 @@ syslog("INFO", "starting ui_writeram.pl"); $ENV{'DAQOPSERVER'}="localhost:7"; use Getopt::Long; +use HADES::TrbNet; my $opt_help; my $opt_chain; @@ -25,6 +26,9 @@ if($opt_help) { exit(0); } +die "DAQOPSERVER not set in environment" unless (defined $ENV{'DAQOPSERVER'}); +die "can not connect to trbnet-daemon on $ENV{'DAQOPSERVER'}: ".trb_strerror() unless (defined &trb_init_ports()); + sub help(){ @@ -167,8 +171,8 @@ sub execute_shell_command_return { my $num_words = 0; -# this subroutine -# changes parameter 0, which holds the file handle +#this subroutine +#changes parameter 0, which holds the file handle sub memfile_writeline($$$$) { my($memfile, $memfilenames, $memfiles_prefix, $line_string)=@_; my $filenum = floor($num_words/256); @@ -196,6 +200,8 @@ sub memfile_writeline($$$$) { $num_words++; } + + if(not( -e "/tmp/jtag_initmem")) { system("mkdir /tmp/jtag_initmem"); } @@ -220,6 +226,8 @@ else { # File with prefix names files for last programmed values my $lastprogfilename = "/tmp/jtag_initmem/lastprog.txt"; my $handle_lastprog = FileHandle->new($lastprogfilename, 'w'); +my $memhash; + # loop through chains foreach my $chain (keys %allchains) { @@ -236,17 +244,18 @@ foreach my $chain (keys %allchains) { my @old_drs_length; my @irs; my $irlen; - my $fpga_addr = $settings{'FPGAtrbnetAddr'}; - my $ram_addr = $settings{'RAMtrbnetAddr'}; - my $cmd_reg_addr = $settings{'CMDreg_trbnetAddr'}; - my $ram_base_addr = $settings{'RAMbase_trbnetAddr'}; - my $data_reg_addr = $settings{'DATAreg_trbnetAddr'}; + my $fpga_addr = any2dec($settings{'FPGAtrbnetAddr'}); + my $ram_addr = any2dec($settings{'RAMtrbnetAddr'}); + my $cmd_reg_addr = any2dec($settings{'CMDreg_trbnetAddr'}); + my $ram_base_addr = any2dec($settings{'RAMbase_trbnetAddr'}); + my $data_reg_addr = any2dec($settings{'DATAreg_trbnetAddr'}); my $memfiles_prefix; # the same prefix is used for the files for one chain # need one file per chip with at maximum 256 32 bit words # that are written at once. # then the RAM base pointer has to be changed for the next chip my @memfilenames=(); + $memfiles_prefix="$initmem_folder/$chain"; foreach my $setting_name (sort keys %settings) { if ($setting_name =~ /sensor[0-9]+/) { @@ -304,6 +313,7 @@ foreach my $chain (keys %allchains) { $word = $word + scalar @irs; ### $word = ($word<<16) + pack("L", scalar(@irs)); print $handle "0x" . uc (substr(reverse(join('',unpack("h8", pack("L", $word)))),0,8)) . "\t# IRlen & numregs \n"; + push(@{$memhash->{$setting_name}},$word); #####print $handle "0x" .uc (substr(reverse(join('',unpack("h8", pack("L", scalar($this_irlen))))),4,4)) . uc (substr(reverse(join('',unpack("h8", pack("L", scalar(@irs))))),4,4)) . "\t# IRlen & numregs \n"; #print "reverse test: " . reverse32bit(0x00000001)."\n"; @@ -315,6 +325,7 @@ foreach my $chain (keys %allchains) { # write DEV_ID $word = 0x4D323601; print $handle "0x" . uc (substr(reverse(join('',unpack("h8", pack("L", $word)))),0,8)) . "\t# DEV_ID \n"; + push(@{$memhash->{$setting_name}},$word); $crcword = pack("L", reverse32bit($word)); $crc0 = crc32($crcword, $crc0); my $crc0_rn = ~reverse32bit($crc0); @@ -328,12 +339,14 @@ foreach my $chain (keys %allchains) { $crcword = pack("L", reverse32bit($word)); $crc0 = crc32($crcword, $crc0); print $handle "0x" . uc (substr(reverse(join('',unpack("h8", pack("L", $word)))),0,8)) . "\t# Pointer + reserved \n"; + push(@{$memhash->{$setting_name}},$word); $word = $drlen; $crcword = pack("L", reverse32bit($word)); $crc0 = crc32($crcword, $crc0); #print $handle "0x0000". uc (substr(reverse(join('',unpack("h8", pack("L", scalar($drlen))))),4,4)) . "\t# Length\n"; print $handle "0x" . uc (substr(reverse(join('',unpack("h8",pack("L", $word)))),0,8)) . "\t# Length\n"; + push(@{$memhash->{$setting_name}},$word); $offset += floor(($drlen+31)/32); } # write CRC-32 @@ -342,6 +355,7 @@ foreach my $chain (keys %allchains) { #printf "CRC: %0.8X.\n", $crc0_rn, 1; my $line_crc = sprintf "%0.8X", $crc0_rn; print $handle "0x". substr($line_crc,length($line_crc)-8,8) . "\t# CRC-32\n"; + push(@{$memhash->{$setting_name}},$crc0_rn); my $crc1 = 0xFFFFFFFF; # write IRs @@ -353,12 +367,15 @@ foreach my $chain (keys %allchains) { $crcword = pack("L", reverse32bit($word)); $crc1 = crc32($crcword, $crc1); print $handle "0x".("0"x(8-length($ir))).uc($ir) . "\t# IR\n"; + push(@{$memhash->{$setting_name}},hex($ir)); + } # write BYPASSREG IR $word = unpack("L", pack("h*", (scalar reverse uc($bypassreg)) ."000000")); $crcword = pack("L", reverse32bit($word)); $crc1 = crc32($crcword, $crc1); print $handle "0x".("0"x(8-length($bypassreg))).uc($bypassreg) . "\t# IR BYPASS\n"; + push(@{$memhash->{$setting_name}},hex($bypassreg)); # write DRs for(my $reg_i=0;$reg_i<@irs;$reg_i++) { @@ -373,26 +390,30 @@ foreach my $chain (keys %allchains) { $crc1 = crc32($crcword, $crc1); my $linestr = "0x". substr($drs[$reg_i],($numwords-$i-1)*8,8) . "\t# DR" . $reg_i . "\n"; print $handle $linestr; + push(@{$memhash->{$setting_name}},hex(substr($drs[$reg_i],($numwords-$i-1)*8,8))); } } #write CRC-32 my $crc1_rn = ~reverse32bit($crc1); $line_crc = sprintf "%0.8X", $crc1_rn; print $handle "0x". substr($line_crc,length($line_crc)-8,8) . "\t# CRC-32\n"; - + push(@{$memhash->{$setting_name}},$crc1_rn); } } - my $numchips_hex = int_to_32bit_hex(scalar @sensors); +# my $numchips_hex = int_to_32bit_hex(scalar @sensors); #if(not defined($opt_quiet)) { print "trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A 2>&1\n"; } # CMD_STOP #my $result = `trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A 2>&1 \n`; # CMD_STOP - execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A", ""); # CMD_STOP + trb_register_write($fpga_addr ,$cmd_reg_addr,0x0000000A); +# execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x0000000A", ""); # CMD_STOP #if(not($? == 0)) {syslog("ERR", "trbcmd returned $?. Output: $result.")} #if(not defined($opt_quiet)) { print "trbcmd w $fpga_addr $data_reg_addr 0x$numchips_hex\n"; } # ADDR_CONTROL_DATA_REGISTER #$result = `trbcmd w $fpga_addr $data_reg_addr 0x$numchips_hex 2>&1\n`; # ADDR_CONTROL_DATA_REGISTER - execute_shell_command("trbcmd w $fpga_addr $data_reg_addr 0x$numchips_hex", ""); # ADDR_CONTROL_DATA_REGISTER + trb_register_write($fpga_addr ,$data_reg_addr,scalar @sensors); +# execute_shell_command("trbcmd w $fpga_addr $data_reg_addr 0x$numchips_hex", ""); # ADDR_CONTROL_DATA_REGISTER #if(not defined($opt_quiet)) { print "trbcmd w $fpga_addr $cmd_reg_addr 0x00000033\n"; } # COMMAND: M26C_CMD_SET_NUMCHIPS_CONFIGURED #$result = `trbcmd w $fpga_addr $cmd_reg_addr 0x00000033\n`; # COMMAND: M26C_CMD_SET_NUMCHIPS_CONFIGURED - execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x00000033", ""); + trb_register_write($fpga_addr ,$cmd_reg_addr,0x00000033); +# execute_shell_command("trbcmd w $fpga_addr $cmd_reg_addr 0x00000033", ""); for(my $i=0;$i $drs_binary{$_}\n" } keys %drs_binary; # $drs_offset{$irs[0]} = 4+(scalar @irs)*2; -- 2.43.0