From a26009bba0b006c98438de5218b30f771958c0bb Mon Sep 17 00:00:00 2001 From: Andreas Neiser Date: Fri, 27 Feb 2015 14:19:47 +0100 Subject: [PATCH] TRIGGER_OUT in adc clock domain --- ADC/source/adc_processor_cfd.vhd | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/ADC/source/adc_processor_cfd.vhd b/ADC/source/adc_processor_cfd.vhd index a4d5e47..dc8d58e 100644 --- a/ADC/source/adc_processor_cfd.vhd +++ b/ADC/source/adc_processor_cfd.vhd @@ -36,13 +36,13 @@ architecture arch of adc_processor_cfd is attribute syn_preserve : boolean; attribute syn_hier of arch : architecture is "hard"; - signal CONF_adc, CONF_sys : cfg_cfd_t := cfg_cfd_t_INIT; - attribute syn_keep of CONF_adc, CONF_sys : signal is true; - attribute syn_preserve of CONF_adc, CONF_sys : signal is true; + signal CONF_adc : cfg_cfd_t := cfg_cfd_t_INIT; + attribute syn_keep of CONF_adc : signal is true; + attribute syn_preserve of CONF_adc : signal is true; signal trigger_gen, trigger_mask : std_logic_vector(CHANNELS - 1 downto 0); type debug_t is array (CHANNELS - 1 downto 0) of debug_cfd_t; - signal debug_adc, debug_sys : debug_t; + signal debug_adc : debug_t; signal reg_buffer_addr : std_logic_vector(4 downto 0) := (others => '0'); signal reg_buffer_read : std_logic; @@ -66,16 +66,14 @@ architecture arch of adc_processor_cfd is signal busy_out_adc, busy_out_sys : std_logic_vector(CHANNELS-1 downto 0) := (others => '0'); begin CONF_adc <= CONFIG when rising_edge(CLK_ADC); - CONF_sys <= CONFIG when rising_edge(CLK_SYS); - trigger_mask <= CONF_sys.TriggerEnable((DEVICE + 1) * CHANNELS - 1 downto DEVICE * CHANNELS); - TRIGGER_OUT <= or_all(trigger_gen and trigger_mask) when rising_edge(CLK_SYS); + trigger_mask <= CONF_adc.TriggerEnable((DEVICE + 1) * CHANNELS - 1 downto DEVICE * CHANNELS); + TRIGGER_OUT <= or_all(trigger_gen and trigger_mask) when rising_edge(CLK_ADC); - debug_sys <= debug_adc when rising_edge(CLK_SYS); busy_in_adc <= busy_in_sys when rising_edge(CLK_ADC); busy_out_sys <= busy_out_adc when rising_edge(CLK_SYS); gen_cfd : for i in 0 to CHANNELS - 1 generate - trigger_gen(i) <= debug_sys(i).Trigger; + trigger_gen(i) <= debug_adc(i).Trigger; THE_CFD : entity work.adc_processor_cfd_ch generic map( -- 2.43.0