From a64d1f041708d4b0548fea338bfde6c360b74be8 Mon Sep 17 00:00:00 2001
From: hadaq <hadaq>
Date: Wed, 2 Feb 2011 12:27:51 +0000
Subject: [PATCH] fgpa_read/write pexor ready (32-bit address)

---
 libtrbnet/trbnet.c | 16 ++++++++++++----
 libtrbnet/trbnet.h |  6 ++++++
 2 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/libtrbnet/trbnet.c b/libtrbnet/trbnet.c
index 54fdcce..9d132ca 100644
--- a/libtrbnet/trbnet.c
+++ b/libtrbnet/trbnet.c
@@ -1,4 +1,4 @@
-const char trbnet_version[] = "$Revision: 4.1 $";
+const char trbnet_version[] = "$Revision: 4.2 $";
 
 #include <stdlib.h>
 #include <signal.h>
@@ -255,7 +255,7 @@ static inline void com_reset_FPGA()
 
 #else   /* PEXOR */
 
-static inline int write32_to_FPGA(uint16_t address, uint32_t value)
+static inline int write32_to_FPGA(uint32_t address, uint32_t value)
 {
   struct pexor_reg_io descriptor;
   int status = 0;
@@ -276,7 +276,7 @@ static inline int write32_to_FPGA(uint16_t address, uint32_t value)
   return 0; 
 }
 
-static inline int read32_from_FPGA(uint16_t address, uint32_t* value)
+static inline int read32_from_FPGA(uint32_t address, uint32_t* value)
 {
   struct pexor_reg_io descriptor;
   int status = 0;
@@ -299,7 +299,7 @@ static inline int read32_from_FPGA(uint16_t address, uint32_t* value)
   return 0; 
 }
 
-static inline int read32_from_FPGA_dma(uint16_t fifo_address,
+static inline int read32_from_FPGA_dma(uint32_t fifo_address,
                                        uint32_t* values,
                                        uint32_t size)
 {
@@ -2015,7 +2015,11 @@ int trb_send_trigger_rich(uint8_t trg_input,
   return 0;
 }
 
+#ifndef PEXOR
 int fpga_register_read(uint16_t reg_address, uint32_t* value)
+#else
+int fpga_register_read(uint32_t reg_address, uint32_t* value)
+#endif
 {
   trb_errno = TRB_NONE;
 
@@ -2033,7 +2037,11 @@ int fpga_register_read(uint16_t reg_address, uint32_t* value)
   return 0;
 }
 
+#ifndef PEXOR
 int fpga_register_write(uint16_t reg_address, uint32_t value)
+#else
+int fpga_register_write(uint32_t reg_address, uint32_t value)
+#endif
 {
   trb_errno = TRB_NONE;
 
diff --git a/libtrbnet/trbnet.h b/libtrbnet/trbnet.h
index d51311f..78955a2 100644
--- a/libtrbnet/trbnet.h
+++ b/libtrbnet/trbnet.h
@@ -78,9 +78,15 @@ int trb_send_trigger_rich(uint8_t input,
                           uint8_t random,
                           uint16_t number);
 
+#ifndef PEXOR
 int fpga_register_read(uint16_t reg_address, uint32_t* value);
 
 int fpga_register_write(uint16_t reg_address, uint32_t value);
+#else
+int fpga_register_read(uint32_t reg_address, uint32_t* value);
+
+int fpga_register_write(uint32_t reg_address, uint32_t value);
+#endif
 
 int trb_fifo_flush(uint8_t channel);
 
-- 
2.43.0