From b0a2b082184bd909ba94d9e5f6801df7dedd5fe0 Mon Sep 17 00:00:00 2001 From: Andreas Neiser Date: Thu, 28 May 2015 15:43:40 +0200 Subject: [PATCH] add dqs 6x5 to project file --- ADC/trb3_periph_adc.prj | 1 + 1 file changed, 1 insertion(+) diff --git a/ADC/trb3_periph_adc.prj b/ADC/trb3_periph_adc.prj index ae59479..40cb090 100644 --- a/ADC/trb3_periph_adc.prj +++ b/ADC/trb3_periph_adc.prj @@ -150,6 +150,7 @@ add_file -vhdl -lib "work" "../base/cores/pll_adc10bit.vhd" add_file -vhdl -lib "work" "../base/cores/pll_adc10bit_64.vhd" add_file -vhdl -lib "work" "../base/cores/pll_adc10bit_80.vhd" add_file -vhdl -lib "work" "../base/cores/dqsinput_7x5.vhd" +add_file -vhdl -lib "work" "../base/cores/dqsinput_6x5.vhd" add_file -vhdl -lib "work" "../base/cores/dqsinput_5x5.vhd" add_file -vhdl -lib "work" "../base/cores/dqsinput_4x5.vhd" add_file -vhdl -lib "work" "sim/dqsinput_dummy.vhd" -- 2.43.0