From b1133ca3cbb8a63c926fc1d13cb91cda7de08039 Mon Sep 17 00:00:00 2001 From: Andreas Neiser Date: Thu, 19 Feb 2015 09:42:07 +0100 Subject: [PATCH] Correct baseline subtracted signal generated --- ADC/sim/tb_adcprocessor_cfd.vhd | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/ADC/sim/tb_adcprocessor_cfd.vhd b/ADC/sim/tb_adcprocessor_cfd.vhd index 9100b10..7d0dba7 100644 --- a/ADC/sim/tb_adcprocessor_cfd.vhd +++ b/ADC/sim/tb_adcprocessor_cfd.vhd @@ -30,10 +30,11 @@ begin restart <= '1', '0' after 200 ns; - config.BaselineAlwaysOn <= '1', '0' after 5 us; + config.BaselineAlwaysOn <= '1', '0' after 20 us; config.InputThreshold <= to_unsigned(40, 10); config.BaselineAverage <= to_unsigned(8, 4); + config.PolarityInvert <= '1'; config.check_word1 <= (others => '0'); config.check_word2 <= (others => '0'); -- 2.43.0