From b76b800a65c8e83fad2db1b01ee920a2f646d303 Mon Sep 17 00:00:00 2001 From: Ludwig Maier Date: Wed, 11 Dec 2013 09:59:28 +0100 Subject: [PATCH] nxyter: window ts validation improved --- base/trb3_periph_nxyter.lpf | 6 +-- nxyter/source/nx_data_receiver.vhd | 2 +- nxyter/source/nx_setup.vhd | 2 +- nxyter/source/nx_trigger_handler.vhd | 16 ++++-- nxyter/source/nx_trigger_validate.vhd | 70 +++++++++++++++------------ nxyter/source/nxyter_components.vhd | 1 + nxyter/source/nxyter_fee_board.vhd | 3 +- 7 files changed, 59 insertions(+), 41 deletions(-) diff --git a/base/trb3_periph_nxyter.lpf b/base/trb3_periph_nxyter.lpf index cc8579a..4146e15 100644 --- a/base/trb3_periph_nxyter.lpf +++ b/base/trb3_periph_nxyter.lpf @@ -156,9 +156,9 @@ IOBUF PORT "NX1_I2C_REG_RESET_OUT" IO_TYPE=LVCMOS25 PULLMODE=NONE; IOBUF PORT "NX1_I2C_SDA_INOUT" IO_TYPE=LVCMOS25 PULLMODE=UP; IOBUF PORT "NX1_I2C_SCL_INOUT" IO_TYPE=LVCMOS25 PULLMODE=UP; -IOBUF PORT "NX1_SPI_SDIO_INOUT" IO_TYPE=LVCMOS25 PULLMODE=DOWN; -IOBUF PORT "NX1_SPI_SCLK_OUT" IO_TYPE=LVCMOS25 PULLMODE=DOWN; -IOBUF PORT "NX1_SPI_CSB_OUT" IO_TYPE=LVCMOS25 PULLMODE=UP; +IOBUF PORT "NX1_SPI_SDIO_INOUT" IO_TYPE=LVCMOS25 PULLMODE=DOWN DRIVE=4; +IOBUF PORT "NX1_SPI_SCLK_OUT" IO_TYPE=LVCMOS25 PULLMODE=DOWN DRIVE=4; +IOBUF PORT "NX1_SPI_CSB_OUT" IO_TYPE=LVCMOS25 PULLMODE=UP DRIVE=4; diff --git a/nxyter/source/nx_data_receiver.vhd b/nxyter/source/nx_data_receiver.vhd index 931f49c..dd41a1f 100644 --- a/nxyter/source/nx_data_receiver.vhd +++ b/nxyter/source/nx_data_receiver.vhd @@ -1091,7 +1091,7 @@ begin pll_adc_sample_clk_dphase_r <= x"0"; pll_adc_sample_clk_finedelb <= (others => '0'); pll_adc_not_lock_ctr_clear <= '0'; - nx_fifo_delay <= x"7"; + nx_fifo_delay <= x"8"; reset_adc_handler_r <= '0'; reset_handler_counter_clear <= '0'; adc_bit_shift <= x"0"; diff --git a/nxyter/source/nx_setup.vhd b/nxyter/source/nx_setup.vhd index 65d73aa..269ec21 100644 --- a/nxyter/source/nx_setup.vhd +++ b/nxyter/source/nx_setup.vhd @@ -756,7 +756,7 @@ begin case R_STATE is when R_TIMER_RESTART => - wait_timer_init <= x"5968_2f00"; -- 15s + wait_timer_init <= x"1dcd_6500"; -- 5s R_STATE <= R_IDLE; when R_IDLE => diff --git a/nxyter/source/nx_trigger_handler.vhd b/nxyter/source/nx_trigger_handler.vhd index 1f4f6e9..cd6eb45 100644 --- a/nxyter/source/nx_trigger_handler.vhd +++ b/nxyter/source/nx_trigger_handler.vhd @@ -27,6 +27,7 @@ entity nx_trigger_handler is LVL1_TRG_INFORMATION_IN : in std_logic_vector(23 downto 0); LVL1_INT_TRG_NUMBER_IN : in std_logic_vector(15 downto 0); + FEE_DATA_FINISHED_OUT : out std_logic; FEE_TRG_RELEASE_OUT : out std_logic; FEE_TRG_STATUSBITS_OUT : out std_logic_vector(31 downto 0); @@ -98,6 +99,7 @@ architecture Behavioral of nx_trigger_handler is signal lvl2_trigger_o : std_logic; signal fast_clear_o : std_logic; signal trigger_busy_o : std_logic; + signal fee_data_finished_o : std_logic; signal fee_trg_release_o : std_logic; signal fee_trg_statusbits_o : std_logic_vector(31 downto 0); signal send_testpulse_l : std_logic; @@ -156,7 +158,7 @@ begin DEBUG_OUT(7) <= LVL2_TRIGGER_BUSY_IN; DEBUG_OUT(8) <= valid_trigger_o; DEBUG_OUT(9) <= lvl2_trigger_o; - DEBUG_OUT(10) <= '0'; + DEBUG_OUT(10) <= fee_data_finished_o; DEBUG_OUT(11) <= fee_trg_release_o; DEBUG_OUT(12) <= trigger_busy_o; DEBUG_OUT(13) <= timestamp_trigger; @@ -334,6 +336,7 @@ begin if (RESET_IN = '1') then valid_trigger_o <= '0'; lvl2_trigger_o <= '0'; + fee_data_finished_o <= '0'; fee_trg_release_o <= '0'; fee_trg_statusbits_o <= (others => '0'); fast_clear_o <= '0'; @@ -343,6 +346,7 @@ begin else valid_trigger_o <= '0'; lvl2_trigger_o <= '0'; + fee_data_finished_o <= '0'; fee_trg_release_o <= '0'; fee_trg_statusbits_o <= (others => '0'); fast_clear_o <= '0'; @@ -351,9 +355,9 @@ begin if (LVL1_INVALID_TRG_IN = '1') then -- There was no valid Timing Trigger at CTS, do a fast clear - fast_clear_o <= '1'; - fee_trg_release_o <= '1'; - STATE <= S_IDLE; + fast_clear_o <= '1'; + fee_trg_release_o <= '1'; + STATE <= S_IDLE; else case STATE is when S_IDLE => @@ -376,7 +380,7 @@ begin trigger_busy_o <= '0'; STATE <= S_IDLE; end if; - + when S_CTS_TRIGGER => valid_trigger_o <= '1'; lvl2_trigger_o <= '1'; @@ -396,6 +400,7 @@ begin if (LVL2_TRIGGER_BUSY_IN = '1') then STATE <= S_WAIT_LVL2_TRIGGER_DONE; else + fee_data_finished_o <= '1'; STATE <= S_FEE_TRIGGER_RELEASE; end if; @@ -612,6 +617,7 @@ begin LVL2_TRIGGER_OUT <= lvl2_trigger_o; FAST_CLEAR_OUT <= fast_clear_o; TRIGGER_BUSY_OUT <= trigger_busy_o; + FEE_DATA_FINISHED_OUT <= fee_data_finished_o; FEE_TRG_RELEASE_OUT <= fee_trg_release_o; FEE_TRG_STATUSBITS_OUT <= fee_trg_statusbits_o; diff --git a/nxyter/source/nx_trigger_validate.vhd b/nxyter/source/nx_trigger_validate.vhd index b94c966..05f7094 100644 --- a/nxyter/source/nx_trigger_validate.vhd +++ b/nxyter/source/nx_trigger_validate.vhd @@ -82,7 +82,7 @@ architecture Behavioral of nx_trigger_validate is signal channel_status_cmd : CS_CMDS; -- Process Calculate Trigger Window - signal ts_window_lower_thr : unsigned(11 downto 0); + signal fifo_delay_time : unsigned(11 downto 0); -- Process Timestamp signal d_data_o : std_logic_vector(31 downto 0); @@ -104,6 +104,7 @@ architecture Behavioral of nx_trigger_validate is signal token_return_last : std_logic; signal token_return_first : std_logic; signal ch_status_cmd_tr : CS_CMDS; + signal wait_for_data_time_r : std_logic_vector(19 downto 0); type STATES is (S_TEST_SELF_TRIGGER, S_IDLE, @@ -143,7 +144,7 @@ architecture Behavioral of nx_trigger_validate is -- Data FIFO Delay signal data_fifo_delay_o : unsigned(7 downto 0); - + -- Output signal data_clk_o : std_logic; signal data_o : std_logic_vector(31 downto 0); @@ -232,7 +233,7 @@ begin out_of_window_l <= '0'; out_of_window_h <= '0'; out_of_window_error <= '0'; - ts_window_lower_thr <= (others => '0'); + fifo_delay_time <= (others => '0'); out_of_window_error_ctr <= (others => '0'); else d_data_o <= (others => '0'); @@ -240,8 +241,9 @@ begin out_of_window_l <= '0'; out_of_window_h <= '0'; out_of_window_error <= '0'; + fifo_delay_time <= (others => '0'); ch_status_cmd_pr <= CS_NONE; - + histogram_fill_o <= '0'; histogram_bin_o <= (others => '0'); histogram_adc_o <= (others => '0'); @@ -249,31 +251,28 @@ begin ----------------------------------------------------------------------- -- Calculate Thresholds and values for FIFO Delay ----------------------------------------------------------------------- - - window_lower_thr := timestamp_fpga - cts_trigger_delay; - + if (ts_window_offset(11) = '1') then + -- Offset is negative ts_window_offset_unsigned := (unsigned(ts_window_offset) xor x"fff") + 1; window_lower_thr := - window_lower_thr - ts_window_offset_unsigned; - - -- TS Window Lower Threshold (needed by FIFO Delay) - ts_window_lower_thr <= cts_trigger_delay + ts_window_offset_unsigned; - else + -- Offset is positive window_lower_thr := - window_lower_thr + unsigned(ts_window_offset); + cts_trigger_delay - unsigned(ts_window_offset); + end if; - -- TS Window Lower Threshold (needed by FIFO Delay) - if (cts_trigger_delay > unsigned(ts_window_offset)) then - ts_window_lower_thr <= - cts_trigger_delay - unsigned(ts_window_offset); - else - ts_window_lower_thr <= (others => '0'); - end if; + -- Calculate FIFO Delay + if (window_lower_thr(11) = '0') then + fifo_delay_time <= window_lower_thr; -- unit is 4ns + else + fifo_delay_time <= (others => '0'); end if; + + -- Final ower Threshold value relative to TS Reference TS + window_lower_thr := timestamp_fpga - window_lower_thr; window_upper_thr := window_lower_thr + resize(ts_window_width, 12); @@ -281,8 +280,8 @@ begin unsigned(TIMESTAMP_IN(13 downto 2)) - window_lower_thr; -- Timestamp to be stored - deltaTStore(13 downto 2) := ts_window_check_value; - deltaTStore( 1 downto 0) := unsigned(TIMESTAMP_IN(1 downto 0)); + deltaTStore(13 downto 2) := ts_window_check_value; + deltaTStore( 1 downto 0) := unsigned(TIMESTAMP_IN(1 downto 0)); ----------------------------------------------------------------------- -- Validate incoming Data @@ -420,6 +419,7 @@ begin timestamp_fpga <= (others => '0'); timestamp_ref <= (others => '0'); evt_buffer_clear_o <= '0'; + wait_for_data_time_r <= (others => '0'); STATE <= S_TEST_SELF_TRIGGER; else store_to_fifo <= '0'; @@ -433,11 +433,12 @@ begin ch_status_cmd_tr <= CS_NONE; evt_buffer_clear_o <= '0'; - --wait_for_data_time := - -- resize(nxyter_cv_time, 20) + (data_fifo_delay_o * 32); - wait_for_data_time := x"00008"; + wait_for_data_time := + resize(nxyter_cv_time, 20) + data_fifo_delay_o * 32; + --wait_for_data_time := x"00008"; min_validation_time := resize(ts_window_width * 4, 20); - + wait_for_data_time_r <= wait_for_data_time; + -- Check Token Return token_return_last <= NX_TOKEN_RETURN_IN; if (store_to_fifo = '1' and @@ -465,6 +466,8 @@ begin STATE <= S_WRITE_HEADER; end if; else + wait_timer_reset_all <= '1'; + min_val_time_expired <= '0'; STATE <= S_IDLE; end if; @@ -665,15 +668,17 @@ begin end process PROC_CHANNEL_STATUS; PROC_DATA_FIFO_DELAY: process(CLK_IN) + variable nx_cvt : unsigned(11 downto 0); variable fifo_delay : unsigned(11 downto 0); begin if( rising_edge(CLK_IN) ) then if( RESET_IN = '1') then data_fifo_delay_o <= x"01"; else - fifo_delay := (ts_window_lower_thr / 8) + 1; -- in 32ns - if (fifo_delay > 18 and fifo_delay < 250) then - fifo_delay := fifo_delay - 18; + -- nxyter delay assumed to be 400ns + nx_cvt := nxyter_cv_time / 4; + if (fifo_delay_time > nx_cvt and fifo_delay_time < 1000) then + fifo_delay := (fifo_delay_time - nx_cvt) / 8; data_fifo_delay_o <= fifo_delay(7 downto 0); else data_fifo_delay_o <= x"01"; @@ -762,7 +767,7 @@ begin slv_ack_o <= '1'; when x"0008" => - slv_data_out_o(11 downto 0) <= ts_window_lower_thr; + slv_data_out_o(11 downto 0) <= fifo_delay_time; slv_data_out_o(31 downto 12) <= (others => '0'); slv_ack_o <= '1'; @@ -852,6 +857,11 @@ begin slv_data_out_o(0) <= EVT_BUFFER_FULL_IN; slv_data_out_o(31 downto 1) <= (others => '0'); slv_ack_o <= '1'; + + when x"0019" => + slv_data_out_o(19 downto 0) <= wait_for_data_time_r; + slv_data_out_o(31 downto 20) <= (others => '0'); + slv_ack_o <= '1'; when others => slv_unknown_addr_o <= '1'; diff --git a/nxyter/source/nxyter_components.vhd b/nxyter/source/nxyter_components.vhd index a849588..726e681 100644 --- a/nxyter/source/nxyter_components.vhd +++ b/nxyter/source/nxyter_components.vhd @@ -827,6 +827,7 @@ component nx_trigger_handler LVL1_TRG_CODE_IN : in std_logic_vector(7 downto 0); LVL1_TRG_INFORMATION_IN : in std_logic_vector(23 downto 0); LVL1_INT_TRG_NUMBER_IN : in std_logic_vector(15 downto 0); + FEE_DATA_FINISHED_OUT : out std_logic; FEE_TRG_RELEASE_OUT : out std_logic; FEE_TRG_STATUSBITS_OUT : out std_logic_vector(31 downto 0); INTERNAL_TRIGGER_IN : in std_logic; diff --git a/nxyter/source/nxyter_fee_board.vhd b/nxyter/source/nxyter_fee_board.vhd index 30cff20..15fd44e 100644 --- a/nxyter/source/nxyter_fee_board.vhd +++ b/nxyter/source/nxyter_fee_board.vhd @@ -461,6 +461,7 @@ begin LVL1_TRG_INFORMATION_IN => LVL1_TRG_INFORMATION_IN, LVL1_INT_TRG_NUMBER_IN => LVL1_INT_TRG_NUMBER_IN, + FEE_DATA_FINISHED_OUT => FEE_DATA_FINISHED_OUT, FEE_TRG_RELEASE_OUT => FEE_TRG_RELEASE_OUT, FEE_TRG_STATUSBITS_OUT => FEE_TRG_STATUSBITS_OUT, @@ -693,7 +694,7 @@ begin FEE_DATA_OUT => FEE_DATA_OUT, FEE_DATA_WRITE_OUT => FEE_DATA_WRITE_OUT, - FEE_DATA_FINISHED_OUT => FEE_DATA_FINISHED_OUT, + FEE_DATA_FINISHED_OUT => open, --FEE_DATA_FINISHED_OUT, FEE_DATA_ALMOST_FULL_IN => FEE_DATA_ALMOST_FULL_IN, SLV_READ_IN => slv_read(3), -- 2.43.0