From c3b1a9b29a71fdbb6c08ec786c63e572d0e227bb Mon Sep 17 00:00:00 2001 From: Adrian Weber Date: Fri, 2 Oct 2020 13:57:40 +0200 Subject: [PATCH] calculation of TDC fields in CTS data and corresponding adjustment in simulation --- src/cri_cbm_rich_calib.vhd | 41 ++++++++++++++++----- src/testbench/dataSender_tb.vhd | 64 +++++++++++++++++++++++++++++++-- 2 files changed, 94 insertions(+), 11 deletions(-) diff --git a/src/cri_cbm_rich_calib.vhd b/src/cri_cbm_rich_calib.vhd index 90ecb7a..9f0cb10 100644 --- a/src/cri_cbm_rich_calib.vhd +++ b/src/cri_cbm_rich_calib.vhd @@ -1,6 +1,7 @@ library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; +USE IEEE.std_logic_UNSIGNED.ALL; library work; use work.trb_net_std.all; @@ -140,6 +141,8 @@ begin THE_CALIB_CHECK_MACHINE : process--(calib_current_state, CRI_CAL_ACTIVE, CRI_APL_DATAREADY_IN) + variable cts_data_length : unsigned(9 downto 0) := (others => '0'); + variable cts_TDC_pos : std_logic_vector(15 downto 0) := (others => '0'); begin wait until rising_edge(CLK); @@ -211,6 +214,9 @@ begin when DIRICH_LENGTH => rec_state <= x"6"; + cts_TDC_pos := (others => '0'); + cts_data_length := (others => '0'); + if (cri_apl_caldrdy_in = '1') then data_h <= cri_apl_caldata_in; pack_num_h <= cri_apl_calpacknum_in; @@ -294,18 +300,37 @@ begin pack_num_full <= pack_num_h & cri_apl_calpacknum_in; cal_eod_full <= cal_eod_h & cri_apl_caleod_in; data_rdy <= '1'; + + if (INCLUDE_TDC = c_YES) then + if ( dirich_length_i = dirich_length_input_i) then -- CTS Data header + + cts_data_length := unsigned(data_h(3 downto 0))*2 -- Input Counter + + unsigned(data_h(8 downto 4))*2; -- TriggerChnlCntr + if data_h( 9) = '1' then cts_data_length := cts_data_length + 2; end if; -- inclLastIdle + if data_h(10) = '1' then cts_data_length := cts_data_length + 3; end if; -- inclTrigInfo + if data_h(11) = '1' then cts_data_length := cts_data_length + 1; end if; -- inclTS + + -- ETM word length: for CBM RICH it should be 01. If not, we have a bug + if (data_h(13 downto 12) = b"01") then cts_data_length := cts_data_length + 1; + elsif (data_h(13 downto 12) = b"10") then cts_data_length := cts_data_length + 4; + end if; + + if (( cts_data_length) >= unsigned(dirich_length_input_i)) then -- error; no calibration as this will be found in upacker as well! + cts_TDC_pos := ( others => '0'); + else + cts_TDC_pos := std_logic_vector(unsigned(dirich_length_input_i) - cts_data_length); + end if; + end if; + + if (dirich_length_i < cts_TDC_pos) then + dtype <= x"4"; + end if; + end if; + if (dirich_length_i = x"0001") then --if (combiner_length_i = x"0001") calib_next_state <= DIRICH_LENGTH; else - if ((INCLUDE_TDC = c_YES) and - ( - (dirich_length_i = dirich_length_input_i) or - (dirich_length_i = std_logic_vector(unsigned(combiner_length_i) - 1)) - ) - ) then - dtype <= x"4"; - end if; calib_next_state <= CTS_H; dirich_length_i <= std_logic_vector(unsigned(dirich_length_i) - 1); combiner_length_i <= std_logic_vector(unsigned(combiner_length_i) - 1); diff --git a/src/testbench/dataSender_tb.vhd b/src/testbench/dataSender_tb.vhd index fb5e7e1..954eefc 100644 --- a/src/testbench/dataSender_tb.vhd +++ b/src/testbench/dataSender_tb.vhd @@ -183,7 +183,7 @@ begin pack_num_in <= "011"; dready_in <= '1'; wait for 10 ns; - data_in <= x"0001"; + data_in <= x"0008"; pack_num_in <= "000"; dready_in <= '1'; wait for 10 ns; @@ -191,13 +191,71 @@ begin pack_num_in <= "001"; dready_in <= '1'; wait for 10 ns; - data_in <= x"0123"; + data_in <= x"1001"; --ctsheader pack_num_in <= "010"; dready_in <= '1'; wait for 10 ns; - data_in <= x"4567"; + data_in <= x"0201"; + pack_num_in <= "011"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"0234"; --1 + pack_num_in <= "000"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"0000"; + pack_num_in <= "001"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"1234"; --2 + pack_num_in <= "010"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"0000"; + pack_num_in <= "011"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"5435"; --3 + pack_num_in <= "000"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"0000"; + pack_num_in <= "001"; + dready_in <= '1'; +--TDC + wait for 10 ns; + data_in <= x"6000"; + pack_num_in <= "010"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"1000"; + pack_num_in <= "011"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"8000"; + pack_num_in <= "000"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"1000"; + pack_num_in <= "001"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"8010"; + pack_num_in <= "010"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"1100"; pack_num_in <= "011"; dready_in <= '1'; + wait for 10 ns; + data_in <= x"0000"; + pack_num_in <= "000"; + dready_in <= '1'; + wait for 10 ns; + data_in <= x"cccc"; + pack_num_in <= "001"; + dready_in <= '1'; + wait for 10 ns; data_in <= x"0000"; fee_busy_in <= '0'; -- 2.43.0