From c7a67d2d1b9c611ad46e9967f7ff744c76eb5177 Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Thu, 23 Jul 2009 09:35:46 +0000 Subject: [PATCH] *** empty log message *** --- ..._8192depth_36width_dual_thresh_reg_out.jhd | 581 ++++++++++++++++++ ..._8192depth_36width_dual_thresh_reg_out.naf | 120 ++++ ..._8192depth_36width_dual_thresh_reg_out.srp | 45 ++ 3 files changed, 746 insertions(+) create mode 100644 design/fifo_8192depth_36width_dual_thresh_reg_out.jhd create mode 100644 design/fifo_8192depth_36width_dual_thresh_reg_out.naf create mode 100644 design/fifo_8192depth_36width_dual_thresh_reg_out.srp diff --git a/design/fifo_8192depth_36width_dual_thresh_reg_out.jhd b/design/fifo_8192depth_36width_dual_thresh_reg_out.jhd new file mode 100644 index 0000000..3db46d9 --- /dev/null +++ b/design/fifo_8192depth_36width_dual_thresh_reg_out.jhd @@ -0,0 +1,581 @@ +MODULE fifo_8192depth_36width_dual_thresh_reg_out DEFIN fifo_8192depth_36width_dual_thresh_reg_out.vhd + SUBMODULE FADD2B + INSTANCE a3 + SUBMODULE VLO + INSTANCE scuba_vlo_inst + SUBMODULE AGEB2 + INSTANCE af_set_cmp_6 + SUBMODULE AGEB2 + INSTANCE af_set_cmp_5 + SUBMODULE AGEB2 + INSTANCE af_set_cmp_4 + SUBMODULE AGEB2 + INSTANCE af_set_cmp_3 + SUBMODULE AGEB2 + INSTANCE af_set_cmp_2 + SUBMODULE AGEB2 + INSTANCE af_set_cmp_1 + SUBMODULE AGEB2 + INSTANCE af_set_cmp_0 + SUBMODULE FADD2B + INSTANCE af_set_cmp_ci_a + SUBMODULE FSUB2B + INSTANCE wcnt_7 + SUBMODULE FSUB2B + INSTANCE wcnt_6 + SUBMODULE FSUB2B + INSTANCE wcnt_5 + SUBMODULE FSUB2B + INSTANCE wcnt_4 + SUBMODULE FSUB2B + INSTANCE wcnt_3 + SUBMODULE FSUB2B + INSTANCE wcnt_2 + SUBMODULE FSUB2B + INSTANCE wcnt_1 + SUBMODULE FSUB2B + INSTANCE wcnt_0 + SUBMODULE FADD2B + INSTANCE a2 + SUBMODULE AGEB2 + INSTANCE ae_set_cmp_6 + SUBMODULE AGEB2 + INSTANCE ae_set_cmp_5 + SUBMODULE AGEB2 + INSTANCE ae_set_cmp_4 + SUBMODULE AGEB2 + INSTANCE ae_set_cmp_3 + SUBMODULE AGEB2 + INSTANCE ae_set_cmp_2 + SUBMODULE AGEB2 + INSTANCE ae_set_cmp_1 + SUBMODULE AGEB2 + INSTANCE ae_set_cmp_0 + SUBMODULE FADD2B + INSTANCE ae_set_cmp_ci_a + SUBMODULE FSUB2B + INSTANCE rcnt_7 + SUBMODULE FSUB2B + INSTANCE rcnt_6 + SUBMODULE FSUB2B + INSTANCE rcnt_5 + SUBMODULE FSUB2B + INSTANCE rcnt_4 + SUBMODULE FSUB2B + INSTANCE rcnt_3 + SUBMODULE FSUB2B + INSTANCE rcnt_2 + SUBMODULE FSUB2B + INSTANCE rcnt_1 + SUBMODULE FSUB2B + INSTANCE rcnt_0 + SUBMODULE MUX41 + INSTANCE mux_0 + SUBMODULE MUX41 + INSTANCE mux_1 + SUBMODULE MUX41 + INSTANCE mux_2 + SUBMODULE MUX41 + INSTANCE mux_3 + SUBMODULE MUX41 + INSTANCE mux_4 + SUBMODULE MUX41 + INSTANCE mux_5 + SUBMODULE MUX41 + INSTANCE mux_6 + SUBMODULE MUX41 + INSTANCE mux_7 + SUBMODULE MUX41 + INSTANCE mux_8 + SUBMODULE MUX41 + INSTANCE mux_9 + SUBMODULE MUX41 + INSTANCE mux_10 + SUBMODULE MUX41 + INSTANCE mux_11 + SUBMODULE MUX41 + INSTANCE mux_12 + SUBMODULE MUX41 + INSTANCE mux_13 + SUBMODULE MUX41 + INSTANCE mux_14 + SUBMODULE MUX41 + INSTANCE mux_15 + SUBMODULE MUX41 + INSTANCE mux_16 + SUBMODULE MUX41 + INSTANCE mux_17 + SUBMODULE MUX41 + INSTANCE mux_18 + SUBMODULE MUX41 + INSTANCE mux_19 + SUBMODULE MUX41 + INSTANCE mux_20 + SUBMODULE MUX41 + INSTANCE mux_21 + SUBMODULE MUX41 + INSTANCE mux_22 + SUBMODULE MUX41 + INSTANCE mux_23 + SUBMODULE MUX41 + INSTANCE mux_24 + SUBMODULE MUX41 + INSTANCE mux_25 + SUBMODULE MUX41 + INSTANCE mux_26 + SUBMODULE MUX41 + INSTANCE mux_27 + SUBMODULE MUX41 + INSTANCE mux_28 + SUBMODULE MUX41 + INSTANCE mux_29 + SUBMODULE MUX41 + INSTANCE mux_30 + SUBMODULE MUX41 + INSTANCE mux_31 + SUBMODULE MUX41 + INSTANCE mux_32 + SUBMODULE MUX41 + INSTANCE mux_33 + SUBMODULE MUX41 + INSTANCE mux_34 + SUBMODULE MUX41 + INSTANCE mux_35 + SUBMODULE CU2 + INSTANCE r_ctr_6 + SUBMODULE CU2 + INSTANCE r_ctr_5 + SUBMODULE CU2 + INSTANCE r_ctr_4 + SUBMODULE CU2 + INSTANCE r_ctr_3 + SUBMODULE CU2 + INSTANCE r_ctr_2 + SUBMODULE CU2 + INSTANCE r_ctr_1 + SUBMODULE CU2 + INSTANCE r_ctr_0 + SUBMODULE FADD2B + INSTANCE r_ctr_cia + SUBMODULE VHI + INSTANCE scuba_vhi_inst + SUBMODULE CU2 + INSTANCE w_ctr_6 + SUBMODULE CU2 + INSTANCE w_ctr_5 + SUBMODULE CU2 + INSTANCE w_ctr_4 + SUBMODULE CU2 + INSTANCE w_ctr_3 + SUBMODULE CU2 + INSTANCE w_ctr_2 + SUBMODULE CU2 + INSTANCE w_ctr_1 + SUBMODULE CU2 + INSTANCE w_ctr_0 + SUBMODULE FADD2B + INSTANCE w_ctr_cia + SUBMODULE FADD2B + INSTANCE a1 + SUBMODULE AGEB2 + INSTANCE g_cmp_6 + SUBMODULE AGEB2 + INSTANCE g_cmp_5 + SUBMODULE AGEB2 + INSTANCE g_cmp_4 + SUBMODULE AGEB2 + INSTANCE g_cmp_3 + SUBMODULE AGEB2 + INSTANCE g_cmp_2 + SUBMODULE AGEB2 + INSTANCE g_cmp_1 + SUBMODULE AGEB2 + INSTANCE g_cmp_0 + SUBMODULE FADD2B + INSTANCE g_cmp_ci_a + SUBMODULE FADD2B + INSTANCE a0 + SUBMODULE ALEB2 + INSTANCE e_cmp_6 + SUBMODULE ALEB2 + INSTANCE e_cmp_5 + SUBMODULE ALEB2 + INSTANCE e_cmp_4 + SUBMODULE ALEB2 + INSTANCE e_cmp_3 + SUBMODULE ALEB2 + INSTANCE e_cmp_2 + SUBMODULE ALEB2 + INSTANCE e_cmp_1 + SUBMODULE ALEB2 + INSTANCE e_cmp_0 + SUBMODULE FADD2B + INSTANCE e_cmp_ci_a + SUBMODULE CB2 + INSTANCE bdcnt_bctr_6 + SUBMODULE CB2 + INSTANCE bdcnt_bctr_5 + SUBMODULE CB2 + INSTANCE bdcnt_bctr_4 + SUBMODULE CB2 + INSTANCE bdcnt_bctr_3 + SUBMODULE CB2 + INSTANCE bdcnt_bctr_2 + SUBMODULE CB2 + INSTANCE bdcnt_bctr_1 + SUBMODULE CB2 + INSTANCE bdcnt_bctr_0 + SUBMODULE FADD2B + INSTANCE bdcnt_bctr_cia + SUBMODULE FD1S3DX + INSTANCE FF_0 + SUBMODULE FD1S3DX + INSTANCE FF_1 + SUBMODULE FD1S3DX + INSTANCE FF_2 + SUBMODULE FD1S3DX + INSTANCE FF_3 + SUBMODULE FD1S3DX + INSTANCE FF_4 + SUBMODULE FD1S3DX + INSTANCE FF_5 + SUBMODULE FD1S3DX + INSTANCE FF_6 + SUBMODULE FD1S3DX + INSTANCE FF_7 + SUBMODULE FD1S3DX + INSTANCE FF_8 + SUBMODULE FD1S3DX + INSTANCE FF_9 + SUBMODULE FD1S3DX + INSTANCE FF_10 + SUBMODULE FD1S3DX + INSTANCE FF_11 + SUBMODULE FD1S3DX + INSTANCE FF_12 + SUBMODULE FD1S3DX + INSTANCE FF_13 + SUBMODULE FD1S3DX + INSTANCE FF_14 + SUBMODULE FD1S3BX + INSTANCE FF_15 + SUBMODULE FD1S3DX + INSTANCE FF_16 + SUBMODULE FD1S3DX + INSTANCE FF_17 + SUBMODULE FD1S3DX + INSTANCE FF_18 + SUBMODULE FD1S3DX + INSTANCE FF_19 + SUBMODULE FD1S3DX + INSTANCE FF_20 + SUBMODULE FD1S3DX + INSTANCE FF_21 + SUBMODULE FD1S3DX + INSTANCE FF_22 + SUBMODULE FD1S3DX + INSTANCE FF_23 + SUBMODULE FD1S3DX + INSTANCE FF_24 + SUBMODULE FD1S3DX + INSTANCE FF_25 + SUBMODULE FD1S3DX + INSTANCE FF_26 + SUBMODULE FD1S3DX + INSTANCE FF_27 + SUBMODULE FD1S3DX + INSTANCE FF_28 + SUBMODULE FD1S3DX + INSTANCE FF_29 + SUBMODULE FD1P3DX + INSTANCE FF_30 + SUBMODULE FD1P3DX + INSTANCE FF_31 + SUBMODULE FD1P3DX + INSTANCE FF_32 + SUBMODULE FD1P3DX + INSTANCE FF_33 + SUBMODULE FD1P3DX + INSTANCE FF_34 + SUBMODULE FD1P3DX + INSTANCE FF_35 + SUBMODULE FD1P3DX + INSTANCE FF_36 + SUBMODULE FD1P3DX + INSTANCE FF_37 + SUBMODULE FD1P3DX + INSTANCE FF_38 + SUBMODULE FD1P3DX + INSTANCE FF_39 + SUBMODULE FD1P3DX + INSTANCE FF_40 + SUBMODULE FD1P3DX + INSTANCE FF_41 + SUBMODULE FD1P3DX + INSTANCE FF_42 + SUBMODULE FD1P3DX + INSTANCE FF_43 + SUBMODULE FD1P3DX + INSTANCE FF_44 + SUBMODULE FD1P3DX + INSTANCE FF_45 + SUBMODULE FD1P3DX + INSTANCE FF_46 + SUBMODULE FD1P3DX + INSTANCE FF_47 + SUBMODULE FD1P3DX + INSTANCE FF_48 + SUBMODULE FD1P3DX + INSTANCE FF_49 + SUBMODULE FD1P3DX + INSTANCE FF_50 + SUBMODULE FD1P3DX + INSTANCE FF_51 + SUBMODULE FD1P3DX + INSTANCE FF_52 + SUBMODULE FD1P3DX + INSTANCE FF_53 + SUBMODULE FD1P3DX + INSTANCE FF_54 + SUBMODULE FD1P3DX + INSTANCE FF_55 + SUBMODULE FD1P3DX + INSTANCE FF_56 + SUBMODULE FD1P3DX + INSTANCE FF_57 + SUBMODULE FD1P3DX + INSTANCE FF_58 + SUBMODULE FD1P3DX + INSTANCE FF_59 + SUBMODULE FD1P3DX + INSTANCE FF_60 + SUBMODULE FD1P3DX + INSTANCE FF_61 + SUBMODULE FD1P3DX + INSTANCE FF_62 + SUBMODULE FD1P3DX + INSTANCE FF_63 + SUBMODULE FD1P3DX + INSTANCE FF_64 + SUBMODULE FD1P3DX + INSTANCE FF_65 + SUBMODULE FD1P3DX + INSTANCE FF_66 + SUBMODULE FD1P3DX + INSTANCE FF_67 + SUBMODULE FD1P3DX + INSTANCE FF_68 + SUBMODULE FD1P3DX + INSTANCE FF_69 + SUBMODULE FD1P3DX + INSTANCE FF_70 + SUBMODULE FD1P3DX + INSTANCE FF_71 + SUBMODULE FD1P3DX + INSTANCE FF_72 + SUBMODULE FD1P3DX + INSTANCE FF_73 + SUBMODULE FD1P3DX + INSTANCE FF_74 + SUBMODULE FD1P3DX + INSTANCE FF_75 + SUBMODULE FD1P3DX + INSTANCE FF_76 + SUBMODULE FD1P3DX + INSTANCE FF_77 + SUBMODULE FD1P3DX + INSTANCE FF_78 + SUBMODULE FD1P3DX + INSTANCE FF_79 + SUBMODULE FD1P3DX + INSTANCE FF_80 + SUBMODULE FD1P3DX + INSTANCE FF_81 + SUBMODULE FD1P3DX + INSTANCE FF_82 + SUBMODULE FD1P3DX + INSTANCE FF_83 + SUBMODULE FD1P3DX + INSTANCE FF_84 + SUBMODULE FD1P3DX + INSTANCE FF_85 + SUBMODULE FD1P3DX + INSTANCE FF_86 + SUBMODULE FD1P3DX + INSTANCE FF_87 + SUBMODULE FD1P3DX + INSTANCE FF_88 + SUBMODULE FD1P3DX + INSTANCE FF_89 + SUBMODULE FD1P3DX + INSTANCE FF_90 + SUBMODULE FD1P3DX + INSTANCE FF_91 + SUBMODULE FD1P3DX + INSTANCE FF_92 + SUBMODULE FD1P3DX + INSTANCE FF_93 + SUBMODULE FD1P3DX + INSTANCE FF_94 + SUBMODULE FD1P3DX + INSTANCE FF_95 + SUBMODULE FD1P3DX + INSTANCE FF_96 + SUBMODULE FD1P3DX + INSTANCE FF_97 + SUBMODULE FD1P3DX + INSTANCE FF_98 + SUBMODULE FD1P3DX + INSTANCE FF_99 + SUBMODULE FD1P3DX + INSTANCE FF_100 + SUBMODULE FD1P3DX + INSTANCE FF_101 + SUBMODULE FD1P3DX + INSTANCE FF_102 + SUBMODULE FD1P3DX + INSTANCE FF_103 + SUBMODULE FD1P3DX + INSTANCE FF_104 + SUBMODULE FD1P3DX + INSTANCE FF_105 + SUBMODULE FD1P3DX + INSTANCE FF_106 + SUBMODULE FD1P3DX + INSTANCE FF_107 + SUBMODULE FD1P3DX + INSTANCE FF_108 + SUBMODULE FD1P3BX + INSTANCE FF_109 + SUBMODULE FD1P3DX + INSTANCE FF_110 + SUBMODULE FD1P3DX + INSTANCE FF_111 + SUBMODULE FD1P3DX + INSTANCE FF_112 + SUBMODULE FD1P3DX + INSTANCE FF_113 + SUBMODULE FD1P3DX + INSTANCE FF_114 + SUBMODULE FD1P3DX + INSTANCE FF_115 + SUBMODULE FD1P3DX + INSTANCE FF_116 + SUBMODULE FD1P3DX + INSTANCE FF_117 + SUBMODULE FD1P3DX + INSTANCE FF_118 + SUBMODULE FD1P3DX + INSTANCE FF_119 + SUBMODULE FD1P3DX + INSTANCE FF_120 + SUBMODULE FD1P3DX + INSTANCE FF_121 + SUBMODULE FD1P3DX + INSTANCE FF_122 + SUBMODULE FD1P3BX + INSTANCE FF_123 + SUBMODULE FD1S3DX + INSTANCE FF_124 + SUBMODULE FD1S3BX + INSTANCE FF_125 + SUBMODULE FD1P3DX + INSTANCE FF_126 + SUBMODULE FD1P3DX + INSTANCE FF_127 + SUBMODULE FD1P3DX + INSTANCE FF_128 + SUBMODULE FD1P3DX + INSTANCE FF_129 + SUBMODULE FD1P3DX + INSTANCE FF_130 + SUBMODULE FD1P3DX + INSTANCE FF_131 + SUBMODULE FD1P3DX + INSTANCE FF_132 + SUBMODULE FD1P3DX + INSTANCE FF_133 + SUBMODULE FD1P3DX + INSTANCE FF_134 + SUBMODULE FD1P3DX + INSTANCE FF_135 + SUBMODULE FD1P3DX + INSTANCE FF_136 + SUBMODULE FD1P3DX + INSTANCE FF_137 + SUBMODULE FD1P3DX + INSTANCE FF_138 + SUBMODULE FD1P3DX + INSTANCE FF_139 + SUBMODULE DP16KB + INSTANCE pdp_ram_3_3_0 + SUBMODULE DP16KB + INSTANCE pdp_ram_3_2_1 + SUBMODULE DP16KB + INSTANCE pdp_ram_3_1_2 + SUBMODULE DP16KB + INSTANCE pdp_ram_3_0_3 + SUBMODULE DP16KB + INSTANCE pdp_ram_2_3_4 + SUBMODULE DP16KB + INSTANCE pdp_ram_2_2_5 + SUBMODULE DP16KB + INSTANCE pdp_ram_2_1_6 + SUBMODULE DP16KB + INSTANCE pdp_ram_2_0_7 + SUBMODULE DP16KB + INSTANCE pdp_ram_1_3_8 + SUBMODULE DP16KB + INSTANCE pdp_ram_1_2_9 + SUBMODULE DP16KB + INSTANCE pdp_ram_1_1_10 + SUBMODULE DP16KB + INSTANCE pdp_ram_1_0_11 + SUBMODULE DP16KB + INSTANCE pdp_ram_0_3_12 + SUBMODULE DP16KB + INSTANCE pdp_ram_0_2_13 + SUBMODULE DP16KB + INSTANCE pdp_ram_0_1_14 + SUBMODULE DP16KB + INSTANCE pdp_ram_0_0_15 + SUBMODULE INV + INSTANCE INV_0 + SUBMODULE XOR2 + INSTANCE XOR2_t0 + SUBMODULE AND2 + INSTANCE AND2_t1 + SUBMODULE AND2 + INSTANCE AND2_t2 + SUBMODULE INV + INSTANCE INV_1 + SUBMODULE INV + INSTANCE INV_2 + SUBMODULE XOR2 + INSTANCE XOR2_t3 + SUBMODULE INV + INSTANCE INV_3 + SUBMODULE INV + INSTANCE INV_4 + SUBMODULE AND2 + INSTANCE AND2_t4 + SUBMODULE ROM16X1 + INSTANCE LUT4_0 + SUBMODULE ROM16X1 + INSTANCE LUT4_1 + SUBMODULE INV + INSTANCE INV_5 + SUBMODULE INV + INSTANCE INV_6 + SUBMODULE XOR2 + INSTANCE XOR2_t5 + SUBMODULE AND2 + INSTANCE AND2_t6 + SUBMODULE INV + INSTANCE INV_7 + SUBMODULE AND2 + INSTANCE AND2_t7 + SUBMODULE INV + INSTANCE INV_8 + SUBMODULE AND2 + INSTANCE AND2_t8 diff --git a/design/fifo_8192depth_36width_dual_thresh_reg_out.naf b/design/fifo_8192depth_36width_dual_thresh_reg_out.naf new file mode 100644 index 0000000..ecb375c --- /dev/null +++ b/design/fifo_8192depth_36width_dual_thresh_reg_out.naf @@ -0,0 +1,120 @@ +Data[35] i +Data[34] i +Data[33] i +Data[32] i +Data[31] i +Data[30] i +Data[29] i +Data[28] i +Data[27] i +Data[26] i +Data[25] i +Data[24] i +Data[23] i +Data[22] i +Data[21] i +Data[20] i +Data[19] i +Data[18] i +Data[17] i +Data[16] i +Data[15] i +Data[14] i +Data[13] i +Data[12] i +Data[11] i +Data[10] i +Data[9] i +Data[8] i +Data[7] i +Data[6] i +Data[5] i +Data[4] i +Data[3] i +Data[2] i +Data[1] i +Data[0] i +Clock i +WrEn i +RdEn i +Reset i +AmEmptyThresh[12] i +AmEmptyThresh[11] i +AmEmptyThresh[10] i +AmEmptyThresh[9] i +AmEmptyThresh[8] i +AmEmptyThresh[7] i +AmEmptyThresh[6] i +AmEmptyThresh[5] i +AmEmptyThresh[4] i +AmEmptyThresh[3] i +AmEmptyThresh[2] i +AmEmptyThresh[1] i +AmEmptyThresh[0] i +AmFullThresh[12] i +AmFullThresh[11] i +AmFullThresh[10] i +AmFullThresh[9] i +AmFullThresh[8] i +AmFullThresh[7] i +AmFullThresh[6] i +AmFullThresh[5] i +AmFullThresh[4] i +AmFullThresh[3] i +AmFullThresh[2] i +AmFullThresh[1] i +AmFullThresh[0] i +Q[35] o +Q[34] o +Q[33] o +Q[32] o +Q[31] o +Q[30] o +Q[29] o +Q[28] o +Q[27] o +Q[26] o +Q[25] o +Q[24] o +Q[23] o +Q[22] o +Q[21] o +Q[20] o +Q[19] o +Q[18] o +Q[17] o +Q[16] o +Q[15] o +Q[14] o +Q[13] o +Q[12] o +Q[11] o +Q[10] o +Q[9] o +Q[8] o +Q[7] o +Q[6] o +Q[5] o +Q[4] o +Q[3] o +Q[2] o +Q[1] o +Q[0] o +WCNT[13] o +WCNT[12] o +WCNT[11] o +WCNT[10] o +WCNT[9] o +WCNT[8] o +WCNT[7] o +WCNT[6] o +WCNT[5] o +WCNT[4] o +WCNT[3] o +WCNT[2] o +WCNT[1] o +WCNT[0] o +Empty o +Full o +AlmostEmpty o +AlmostFull o diff --git a/design/fifo_8192depth_36width_dual_thresh_reg_out.srp b/design/fifo_8192depth_36width_dual_thresh_reg_out.srp new file mode 100644 index 0000000..a4db8c0 --- /dev/null +++ b/design/fifo_8192depth_36width_dual_thresh_reg_out.srp @@ -0,0 +1,45 @@ +SCUBA, Version ispLever_v72_SP2_Build (23) +Wed Jul 22 17:09:39 2009 + +Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. +Copyright (c) 1995 AT&T Corp. All rights reserved. +Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. +Copyright (c) 2001 Agere Systems All rights reserved. +Copyright (c) 2002-2008 Lattice Semiconductor Corporation, All rights reserved. + + Issued command : /opt/lattice/ispLEVER7.2/isptools/ispfpga/bin/lin/scuba -w -n fifo_8192depth_36width_dual_thresh_reg_out -lang vhdl -synth synplify -bus_exp 7 -bb -arch ep5m00 -type fifoblk -addr_width 13 -data_width 36 -num_words 8192 -outdata REGISTERED -no_enable -pe 0 -pf 0 -fill -e + Circuit name : fifo_8192depth_36width_dual_thresh_reg_out + Module type : fifoblk + Module Version : 4.6 + Ports : + Inputs : Data[35:0], Clock, WrEn, RdEn, Reset, AmEmptyThresh[12:0], AmFullThresh[12:0] + Outputs : Q[35:0], WCNT[13:0], Empty, Full, AlmostEmpty, AlmostFull + I/O buffer : not inserted + EDIF output : suppressed + VHDL output : fifo_8192depth_36width_dual_thresh_reg_out.vhd + VHDL template : fifo_8192depth_36width_dual_thresh_reg_out_tmpl.vhd + VHDL testbench : tb_fifo_8192depth_36width_dual_thresh_reg_out_tmpl.vhd + VHDL purpose : for synthesis and simulation + Bus notation : big endian + Report output : fifo_8192depth_36width_dual_thresh_reg_out.srp + Element Usage : + AGEB2 : 21 + ALEB2 : 7 + AND2 : 6 + CU2 : 14 + CB2 : 7 + FADD2B : 11 + FSUB2B : 16 + FD1P3BX : 2 + FD1P3DX : 106 + FD1S3BX : 2 + FD1S3DX : 30 + INV : 9 + MUX41 : 36 + ROM16X1 : 2 + XOR2 : 3 + DP16KB : 16 + Estimated Resource Usage: + LUT : 199 + EBR : 16 + Reg : 140 -- 2.43.0