From cde0c06941ba34bc0356f28eebada506aba976a7 Mon Sep 17 00:00:00 2001 From: Michael Boehmer Date: Thu, 30 Jun 2022 21:48:10 +0200 Subject: [PATCH] standalone endpoint implemented --- gbe/config.vhd | 2 +- gbe/tomcat_gbe.lpf | 3 +- gbe/tomcat_gbe.prj | 1 + gbe/tomcat_gbe.vhd | 213 ++++++++++++++++++++++++++++++++++++--------- 4 files changed, 176 insertions(+), 43 deletions(-) diff --git a/gbe/config.vhd b/gbe/config.vhd index 4d759e5..978ae22 100644 --- a/gbe/config.vhd +++ b/gbe/config.vhd @@ -20,7 +20,7 @@ package config is constant SERDES_NUM : integer := 0; -- Address settings - constant INIT_ADDRESS : std_logic_vector := x"F770"; + constant INIT_ADDRESS : std_logic_vector := x"AFFE"; constant BROADCAST_SPECIAL_ADDR : std_logic_vector := x"30"; -- I/O specific diff --git a/gbe/tomcat_gbe.lpf b/gbe/tomcat_gbe.lpf index b5ebea1..7075988 100644 --- a/gbe/tomcat_gbe.lpf +++ b/gbe/tomcat_gbe.lpf @@ -12,7 +12,8 @@ FREQUENCY NET "clk_sys" 100.000 MHz; FREQUENCY NET "CLK_125_c" 125.000 MHz; FREQUENCY NET "GBE/physical/gbe_serdes/tx_pclk" 125.000 MHz; FREQUENCY NET "GBE/physical/CLK_125_RX_OUT" 125.000 MHz; - + +# Outputs BLOCK PATH TO PORT "LED*"; BLOCK PATH TO PORT "PROGRAMN"; BLOCK PATH TO PORT "GPIO*"; diff --git a/gbe/tomcat_gbe.prj b/gbe/tomcat_gbe.prj index 3a5dae0..5b2dc86 100644 --- a/gbe/tomcat_gbe.prj +++ b/gbe/tomcat_gbe.prj @@ -153,6 +153,7 @@ add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0_20 add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs2.vhd" add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_gbe.vhd" +add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_standalone_sctrl.vhd" #TrbNet Endpoint add_file -vhdl -lib work "../../trbnet/trb_net16_term_buf.vhd" diff --git a/gbe/tomcat_gbe.vhd b/gbe/tomcat_gbe.vhd index 8759be3..a7c0de3 100644 --- a/gbe/tomcat_gbe.vhd +++ b/gbe/tomcat_gbe.vhd @@ -92,17 +92,38 @@ architecture arch of tomcat_gbe is attribute syn_keep of GSR_N : signal is true; attribute syn_preserve of GSR_N : signal is true; - signal debug : std_logic_vector(127 downto 0); - - signal status : std_logic_vector(15 downto 0); + signal debug : std_logic_vector(127 downto 0); + signal status : std_logic_vector(15 downto 0); + + signal common_stat_reg : std_logic_vector(std_COMSTATREG*32-1 downto 0) := (others => '0'); + signal common_ctrl_reg : std_logic_vector(std_COMCTRLREG*32-1 downto 0); + signal ctrlbus_tx, bustools_tx, busgbeip_tx, busgbereg_tx, bus_master_in : CTRLBUS_TX; + signal ctrlbus_rx, bustools_rx, busgbeip_rx, busgbereg_rx, bus_master_out : CTRLBUS_RX; + signal bus_master_active : std_logic; + + signal timer : TIMERS; + signal additional_reg : std_logic_vector(31 downto 0); + signal led_off : std_logic; + + signal flash_ncs_i : std_logic; + signal flash_sclk_i : std_logic; + signal flash_miso_i : std_logic; + signal flash_mosi_i : std_logic; + begin ------------------------------------------------------------------------------- -- Important pins ------------------------------------------------------------------------------- - PROGRAMN <= '1'; - +-- PROGRAMN <= '1'; +-- FLASH_OVERRIDE <= '1'; +-- FLASH_SCLK <= 'Z'; +-- FLASH_NCS <= '1'; +-- FLASH_MOSI <= '0'; +-- FLASH_HOLD <= '1'; +-- FLASH_WP <= '1'; + ------------------------------------------------------------------------------- -- Clock & Reset Handling ------------------------------------------------------------------------------- @@ -119,30 +140,6 @@ begin DEBUG_OUT => open ); -------------------------------------------------------------------------------- --- UUID handling, needed as MAC for GbE -------------------------------------------------------------------------------- - THE_UUID_STUFF: trb_net_i2cwire2 - generic map( - USE_TEMPERATURE_READOUT => 1, - CLK_PERIOD => 10 - ) - port map( - CLK => clk_sys, - RESET => clear_i, - READOUT_ENABLE_IN => '1', - --connection to I2C interface - SCL_INOUT => I2C_SCL, - SDA_INOUT => I2C_SDA, - --connection to id ram, according to memory map in TrbNetRegIO - DATA_OUT => open, - ADDR_OUT => open, - WRITE_OUT => open, - TEMP_OUT => open, - ID_OUT => uuid_i, - STAT => open - ); - ------------------------------------------------------------------------------- -- GbE interface ------------------------------------------------------------------------------- @@ -203,8 +200,8 @@ begin FEE_STATUS_BITS_IN => (others => '0'), FEE_BUSY_IN => '0', -- unique adresses - MC_UNIQUE_ID_IN => uuid_i, - MY_TRBNET_ADDRESS_IN => x"c000", + MC_UNIQUE_ID_IN => timer.uid, + MY_TRBNET_ADDRESS_IN => timer.network_address, ISSUE_REBOOT_OUT => reboot_from_gbe, -- slow control by GbE GSC_CLK_IN => clk_sys, @@ -218,10 +215,10 @@ begin GSC_REPLY_READ_OUT => gsc_reply_read, GSC_BUSY_IN => gsc_busy, -- readout - BUS_IP_RX => open, -- registers inside GbE - BUS_IP_TX => open, -- registers inside GbE - BUS_REG_RX => open, -- registers inside GbE - BUS_REG_TX => open, -- registers inside GbE + BUS_IP_RX => busgbeip_rx, -- registers inside GbE + BUS_IP_TX => busgbeip_tx, -- registers inside GbE + BUS_REG_RX => busgbereg_rx, -- registers inside GbE + BUS_REG_TX => busgbereg_tx, -- registers inside GbE -- Forwarder FWD_DST_MAC_IN => (others => '0'), FWD_DST_IP_IN => (others => '0'), @@ -236,9 +233,143 @@ begin MAKE_RESET_OUT => reset_via_gbe, -- reset by GbE -- debug and status STATUS_OUT => status, - DEBUG_OUT => debug --open + DEBUG_OUT => open --debug --open + ); + +------------------------------------------------------------------------------- +-- SCTRL endpoint for GbE standalone +------------------------------------------------------------------------------- + THE_ENDPOINT: entity trb_net16_endpoint_standalone_sctrl + generic map( + FIFO_TO_INT_DEPTH => 6, + FIFO_TO_APL_DEPTH => 6, + APL_WRITE_ALL_WORDS => c_NO, + INIT_ADDRESS => INIT_ADDRESS, + ADDRESS_MASK => x"FFFF", + BROADCAST_BITMASK => x"FF", + REGIO_INIT_ENDPOINT_ID => x"0001", + REGIO_USE_VAR_ENDPOINT_ID => c_NO, + REGIO_USE_1WIRE_INTERFACE => c_I2C_TC + ) + port map( + -- Misc + CLK => clk_sys, + RESET => reset_i, + CLK_EN => '1', + --Port to GbE + GSC_INIT_DATAREADY_IN => gsc_init_dataready, + GSC_INIT_DATA_IN => gsc_init_data, + GSC_INIT_PACKET_NUM_IN => gsc_init_packet_num, + GSC_INIT_READ_OUT => gsc_init_read, + GSC_REPLY_DATAREADY_OUT => gsc_reply_dataready, + GSC_REPLY_DATA_OUT => gsc_reply_data, + GSC_REPLY_PACKET_NUM_OUT => gsc_reply_packet_num, + GSC_REPLY_READ_IN => gsc_reply_read, + GSC_BUSY_OUT => gsc_busy, + GBE_MAKE_RESET_IN => reset_via_gbe, + --Slow Control Port + --common registers 0x00-0x2F + REGIO_COMMON_STAT_REG_IN => common_stat_reg, + REGIO_COMMON_CTRL_REG_OUT => common_ctrl_reg, + REGIO_COMMON_STAT_STROBE_OUT => open, + REGIO_COMMON_CTRL_STROBE_OUT => open, + --internal data port + BUS_RX => ctrlbus_rx, + BUS_TX => ctrlbus_tx, + --Data port - external master (e.g. Flash or Debug) + BUS_MASTER_IN => bus_master_in, + BUS_MASTER_OUT => bus_master_out, + BUS_MASTER_ACTIVE => bus_master_active, + --Sensors & ID + ONEWIRE_INOUT => open, + I2C_SCL => I2C_SCL, + I2C_SDA => I2C_SDA, + -- Generic stuff + TIMERS_OUT => timer, + MY_ADDRESS_OUT => open -- BUG? ); + common_stat_reg <= (others => '0'); + + debug(3 downto 0) <= gsc_init_data(3 downto 0); + debug(6 downto 4) <= gsc_init_packet_num; -- is shifted + debug(7) <= gsc_init_dataready; + debug(8) <= gsc_init_read; + debug(9) <= '0'; + debug(13 downto 10) <= gsc_reply_data(3 downto 0); + debug(16 downto 14) <= gsc_reply_packet_num; + debug(17) <= gsc_reply_dataready; + debug(18) <= gsc_reply_read; + debug(19) <= gsc_busy; + +------------------------------------------------------------------------------- +-- Bus Handler +------------------------------------------------------------------------------- + THE_BUS_HANDLER : entity work.trb_net16_regio_bus_handler_record + generic map( + PORT_NUMBER => 3, + PORT_ADDRESSES => (0 => x"d000", 1 => x"8100", 2 => x"8300", others => x"0000"), + PORT_ADDR_MASK => (0 => 12, 1 => 8, 2 => 8, others => 0), + PORT_MASK_ENABLE => 1 + ) + port map( + CLK => clk_sys, + RESET => reset_i, + REGIO_RX => ctrlbus_rx, + REGIO_TX => ctrlbus_tx, + BUS_RX(0) => bustools_rx, --Flash, SPI, UART, ADC, SED + BUS_RX(1) => busgbeip_rx, + BUS_RX(2) => busgbereg_rx, + BUS_TX(0) => bustools_tx, + BUS_TX(1) => busgbeip_tx, + BUS_TX(2) => busgbereg_tx, + STAT_DEBUG => open + ); + +------------------------------------------------------------------------------- +-- Control Tools +------------------------------------------------------------------------------- + THE_TOOLS : entity work.tomcat_tools + port map( + CLK => clk_sys, + RESET => reset_i, + --Flash & Reload + FLASH_CS => flash_ncs_i, + FLASH_CLK => flash_sclk_i, + FLASH_IN => flash_miso_i, + FLASH_OUT => flash_mosi_i, + PROGRAMN => PROGRAMN, + REBOOT_IN => common_ctrl_reg(15), + -- I2C + SDA_INOUT => SFP_MOD_2, --open, --I2C_SDA, + SCL_INOUT => SFP_MOD_1, --open, --SI2C_SCL, + -- Additional register + ADDITIONAL_REG => additional_reg, + --Slowcontrol + BUS_RX => bustools_rx, + BUS_TX => bustools_tx, + --Control master for default settings + BUS_MASTER_IN => bus_master_in, + BUS_MASTER_OUT => bus_master_out, + BUS_MASTER_ACTIVE => bus_master_active, + DEBUG_OUT => open + ); + +-- led_off <= additional_reg(0); + + -- FlashROM external connections + FLASH_OVERRIDE <= not additional_reg(1); + FLASH_HOLD <= '1'; + FLASH_WP <= '1'; + FLASH_NCS <= flash_ncs_i; + FLASH_SCLK <= flash_sclk_i; + FLASH_MOSI <= flash_mosi_i; + flash_miso_i <= FLASH_MISO; + + -- Jan's proposal + -- led_off <= additional_reg(0); + -- FLASH_OVERRIDE <= not additional_reg(1); + ------------------------------------------------------------------------------- -- Outputs ------------------------------------------------------------------------------- @@ -258,11 +389,11 @@ begin ------------------------------------------------------------------------------- LED_SFP_GREEN <= not (status(0) and status(1) and status(2)); --'0'; LED_SFP_YELLOW <= not (status(3) or status(4)); --'0'; - LED_SFP_RED <= not '0'; - LED(3) <= not '0'; - LED(2) <= not '0'; - LED(1) <= not '0'; - LED(0) <= not status(8); --'0'; + LED_SFP_RED <= not status(8); --'0'; + LED(3) <= not common_ctrl_reg(3); --'0'; + LED(2) <= not common_ctrl_reg(2); --'0'; + LED(1) <= not common_ctrl_reg(1); --'0'; + LED(0) <= not common_ctrl_reg(0); --'0'; -- 0 red -- 1 orange -- 2.43.0