From d2026ad8551f3a169799f73a2c7e45ff8e3ec36e Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Fri, 2 Jul 2010 23:14:59 +0000 Subject: [PATCH] *** empty log message *** --- trb_net_components.vhd | 304 ++++++++++++++++++++--------------------- 1 file changed, 152 insertions(+), 152 deletions(-) diff --git a/trb_net_components.vhd b/trb_net_components.vhd index 55be09f..49fde8f 100644 --- a/trb_net_components.vhd +++ b/trb_net_components.vhd @@ -757,158 +757,158 @@ package trb_net_components is - component trb_net16_gbe_buf is - generic( - DO_SIMULATION : integer range c_NO to c_YES := c_NO - ); - port( - CLK : in std_logic; - TEST_CLK : in std_logic; -- only for simulation! - RESET : in std_logic; - GSR_N : in std_logic; - -- Debug - STAGE_STAT_REGS_OUT : out std_logic_vector(31 downto 0); - STAGE_CTRL_REGS_IN : in std_logic_vector(31 downto 0); - -- configuration interface - IP_CFG_START_IN : in std_logic; - IP_CFG_BANK_SEL_IN : in std_logic_vector(3 downto 0); - IP_CFG_DONE_OUT : out std_logic; - IP_CFG_MEM_ADDR_OUT : out std_logic_vector(7 downto 0); - IP_CFG_MEM_DATA_IN : in std_logic_vector(31 downto 0); - IP_CFG_MEM_CLK_OUT : out std_logic; - MR_RESET_IN : in std_logic; - MR_MODE_IN : in std_logic; - MR_RESTART_IN : in std_logic; - -- gk 29.03.10 - SLV_ADDR_IN : in std_logic_vector(7 downto 0); - SLV_READ_IN : in std_logic; - SLV_WRITE_IN : in std_logic; - SLV_BUSY_OUT : out std_logic; - SLV_ACK_OUT : out std_logic; - SLV_DATA_IN : in std_logic_vector(31 downto 0); - SLV_DATA_OUT : out std_logic_vector(31 downto 0); - -- CTS interface - CTS_NUMBER_IN : in std_logic_vector(15 downto 0); - CTS_CODE_IN : in std_logic_vector(7 downto 0); - CTS_INFORMATION_IN : in std_logic_vector(7 downto 0); - CTS_READOUT_TYPE_IN : in std_logic_vector(3 downto 0); - CTS_START_READOUT_IN : in std_logic; - CTS_DATA_OUT : out std_logic_vector(31 downto 0); - CTS_DATAREADY_OUT : out std_logic; - CTS_READOUT_FINISHED_OUT : out std_logic; - CTS_READ_IN : in std_logic; - CTS_LENGTH_OUT : out std_logic_vector(15 downto 0); - CTS_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0); - -- Data payload interface - FEE_DATA_IN : in std_logic_vector(15 downto 0); - FEE_DATAREADY_IN : in std_logic; - FEE_READ_OUT : out std_logic; - FEE_STATUS_BITS_IN : in std_logic_vector(31 downto 0); - FEE_BUSY_IN : in std_logic; - --SFP Connection - SFP_RXD_P_IN : in std_logic; - SFP_RXD_N_IN : in std_logic; - SFP_TXD_P_OUT : out std_logic; - SFP_TXD_N_OUT : out std_logic; - SFP_REFCLK_P_IN : in std_logic; - SFP_REFCLK_N_IN : in std_logic; - SFP_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) - SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) - SFP_TXDIS_OUT : out std_logic; -- SFP disable - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- PacketConstructor interface - IG_CTS_CTR_TST : out std_logic_vector(2 downto 0); - IG_REM_CTR_TST : out std_logic_vector(3 downto 0); - IG_BSM_LOAD_TST : out std_logic_vector(3 downto 0); - IG_BSM_SAVE_TST : out std_logic_vector(3 downto 0); - IG_DATA_TST : out std_logic_vector(15 downto 0); - IG_WCNT_TST : out std_logic_vector(15 downto 0); - IG_RCNT_TST : out std_logic_vector(16 downto 0); - IG_RD_EN_TST : out std_logic; - IG_WR_EN_TST : out std_logic; - IG_EMPTY_TST : out std_logic; - IG_AEMPTY_TST : out std_logic; - IG_FULL_TST : out std_logic; - IG_AFULL_TST : out std_logic; - PC_WR_EN_TST : out std_logic; - PC_DATA_TST : out std_logic_vector (7 downto 0); - PC_READY_TST : out std_logic; - PC_START_OF_SUB_TST : out std_logic; - PC_END_OF_DATA_TST : out std_logic; - PC_SUB_SIZE_TST : out std_logic_vector(31 downto 0); - PC_TRIG_NR_TST : out std_logic_vector(31 downto 0); - PC_PADDING_TST : out std_logic; - PC_DECODING_TST : out std_logic_vector(31 downto 0); - PC_EVENT_ID_TST : out std_logic_vector(31 downto 0); - PC_QUEUE_DEC_TST : out std_logic_vector(31 downto 0); - PC_BSM_CONSTR_TST : out std_logic_vector(3 downto 0); - PC_BSM_LOAD_TST : out std_logic_vector(3 downto 0); - PC_BSM_SAVE_TST : out std_logic_vector(3 downto 0); - PC_SHF_EMPTY_TST : out std_logic; - PC_SHF_FULL_TST : out std_logic; - PC_DF_EMPTY_TST : out std_logic; - PC_DF_FULL_TST : out std_logic; - PC_ALL_CTR_TST : out std_logic_vector(4 downto 0); - PC_SUB_CTR_TST : out std_logic_vector(4 downto 0); - PC_BYTES_LOADED_TST : out std_logic_vector(15 downto 0); - PC_SIZE_LEFT_TST : out std_logic_vector(31 downto 0); - PC_SUB_SIZE_TO_SAVE_TST : out std_logic_vector(31 downto 0); - PC_SUB_SIZE_LOADED_TST : out std_logic_vector(31 downto 0); - PC_SUB_BYTES_LOADED_TST : out std_logic_vector(31 downto 0); - PC_QUEUE_SIZE_TST : out std_logic_vector(31 downto 0); - PC_ACT_QUEUE_SIZE_TST : out std_logic_vector(31 downto 0); - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- FrameConstructor interface - FC_WR_EN_TST : out std_logic; - FC_DATA_TST : out std_logic_vector(7 downto 0); - FC_H_READY_TST : out std_logic; - FC_READY_TST : out std_logic; - FC_IP_SIZE_TST : out std_logic_vector(15 downto 0); - FC_UDP_SIZE_TST : out std_logic_vector(15 downto 0); - FC_IDENT_TST : out std_logic_vector(15 downto 0); - FC_FLAGS_OFFSET_TST : out std_logic_vector(15 downto 0); - FC_SOD_TST : out std_logic; - FC_EOD_TST : out std_logic; - FC_BSM_CONSTR_TST : out std_logic_vector(7 downto 0); - FC_BSM_TRANS_TST : out std_logic_vector(3 downto 0); - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- FrameTransmitter interface - FT_DATA_TST : out std_logic_vector(8 downto 0); - FT_TX_EMPTY_TST : out std_logic; - FT_START_OF_PACKET_TST : out std_logic; - FT_BSM_INIT_TST : out std_logic_vector(3 downto 0); - FT_BSM_MAC_TST : out std_logic_vector(3 downto 0); - FT_BSM_TRANS_TST : out std_logic_vector(3 downto 0); - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- MAC interface - MAC_HADDR_TST : out std_logic_vector(7 downto 0); - MAC_HDATA_TST : out std_logic_vector(7 downto 0); - MAC_HCS_TST : out std_logic; - MAC_HWRITE_TST : out std_logic; - MAC_HREAD_TST : out std_logic; - MAC_HREADY_TST : out std_logic; - MAC_HDATA_EN_TST : out std_logic; - MAC_FIFOAVAIL_TST : out std_logic; - MAC_FIFOEOF_TST : out std_logic; - MAC_FIFOEMPTY_TST : out std_logic; - MAC_TX_READ_TST : out std_logic; - MAC_TX_DONE_TST : out std_logic; - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- pcs and serdes - PCS_AN_LP_ABILITY_TST : out std_logic_vector(15 downto 0); - PCS_AN_COMPLETE_TST : out std_logic; - PCS_AN_PAGE_RX_TST : out std_logic; - ------------------------------------------------------------------------------------------- - ------------------------------------------------------------------------------------------- - -- debug ports - ANALYZER_DEBUG_OUT : out std_logic_vector(63 downto 0) - ); - end component; +-- component trb_net16_gbe_buf is +-- generic( +-- DO_SIMULATION : integer range c_NO to c_YES := c_NO +-- ); +-- port( +-- CLK : in std_logic; +-- TEST_CLK : in std_logic; -- only for simulation! +-- RESET : in std_logic; +-- GSR_N : in std_logic; +-- -- Debug +-- STAGE_STAT_REGS_OUT : out std_logic_vector(31 downto 0); +-- STAGE_CTRL_REGS_IN : in std_logic_vector(31 downto 0); +-- -- configuration interface +-- IP_CFG_START_IN : in std_logic; +-- IP_CFG_BANK_SEL_IN : in std_logic_vector(3 downto 0); +-- IP_CFG_DONE_OUT : out std_logic; +-- IP_CFG_MEM_ADDR_OUT : out std_logic_vector(7 downto 0); +-- IP_CFG_MEM_DATA_IN : in std_logic_vector(31 downto 0); +-- IP_CFG_MEM_CLK_OUT : out std_logic; +-- MR_RESET_IN : in std_logic; +-- MR_MODE_IN : in std_logic; +-- MR_RESTART_IN : in std_logic; +-- -- gk 29.03.10 +-- SLV_ADDR_IN : in std_logic_vector(7 downto 0); +-- SLV_READ_IN : in std_logic; +-- SLV_WRITE_IN : in std_logic; +-- SLV_BUSY_OUT : out std_logic; +-- SLV_ACK_OUT : out std_logic; +-- SLV_DATA_IN : in std_logic_vector(31 downto 0); +-- SLV_DATA_OUT : out std_logic_vector(31 downto 0); +-- -- CTS interface +-- CTS_NUMBER_IN : in std_logic_vector(15 downto 0); +-- CTS_CODE_IN : in std_logic_vector(7 downto 0); +-- CTS_INFORMATION_IN : in std_logic_vector(7 downto 0); +-- CTS_READOUT_TYPE_IN : in std_logic_vector(3 downto 0); +-- CTS_START_READOUT_IN : in std_logic; +-- CTS_DATA_OUT : out std_logic_vector(31 downto 0); +-- CTS_DATAREADY_OUT : out std_logic; +-- CTS_READOUT_FINISHED_OUT : out std_logic; +-- CTS_READ_IN : in std_logic; +-- CTS_LENGTH_OUT : out std_logic_vector(15 downto 0); +-- CTS_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0); +-- -- Data payload interface +-- FEE_DATA_IN : in std_logic_vector(15 downto 0); +-- FEE_DATAREADY_IN : in std_logic; +-- FEE_READ_OUT : out std_logic; +-- FEE_STATUS_BITS_IN : in std_logic_vector(31 downto 0); +-- FEE_BUSY_IN : in std_logic; +-- --SFP Connection +-- SFP_RXD_P_IN : in std_logic; +-- SFP_RXD_N_IN : in std_logic; +-- SFP_TXD_P_OUT : out std_logic; +-- SFP_TXD_N_OUT : out std_logic; +-- SFP_REFCLK_P_IN : in std_logic; +-- SFP_REFCLK_N_IN : in std_logic; +-- SFP_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) +-- SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) +-- SFP_TXDIS_OUT : out std_logic; -- SFP disable +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- PacketConstructor interface +-- IG_CTS_CTR_TST : out std_logic_vector(2 downto 0); +-- IG_REM_CTR_TST : out std_logic_vector(3 downto 0); +-- IG_BSM_LOAD_TST : out std_logic_vector(3 downto 0); +-- IG_BSM_SAVE_TST : out std_logic_vector(3 downto 0); +-- IG_DATA_TST : out std_logic_vector(15 downto 0); +-- IG_WCNT_TST : out std_logic_vector(15 downto 0); +-- IG_RCNT_TST : out std_logic_vector(16 downto 0); +-- IG_RD_EN_TST : out std_logic; +-- IG_WR_EN_TST : out std_logic; +-- IG_EMPTY_TST : out std_logic; +-- IG_AEMPTY_TST : out std_logic; +-- IG_FULL_TST : out std_logic; +-- IG_AFULL_TST : out std_logic; +-- PC_WR_EN_TST : out std_logic; +-- PC_DATA_TST : out std_logic_vector (7 downto 0); +-- PC_READY_TST : out std_logic; +-- PC_START_OF_SUB_TST : out std_logic; +-- PC_END_OF_DATA_TST : out std_logic; +-- PC_SUB_SIZE_TST : out std_logic_vector(31 downto 0); +-- PC_TRIG_NR_TST : out std_logic_vector(31 downto 0); +-- PC_PADDING_TST : out std_logic; +-- PC_DECODING_TST : out std_logic_vector(31 downto 0); +-- PC_EVENT_ID_TST : out std_logic_vector(31 downto 0); +-- PC_QUEUE_DEC_TST : out std_logic_vector(31 downto 0); +-- PC_BSM_CONSTR_TST : out std_logic_vector(3 downto 0); +-- PC_BSM_LOAD_TST : out std_logic_vector(3 downto 0); +-- PC_BSM_SAVE_TST : out std_logic_vector(3 downto 0); +-- PC_SHF_EMPTY_TST : out std_logic; +-- PC_SHF_FULL_TST : out std_logic; +-- PC_DF_EMPTY_TST : out std_logic; +-- PC_DF_FULL_TST : out std_logic; +-- PC_ALL_CTR_TST : out std_logic_vector(4 downto 0); +-- PC_SUB_CTR_TST : out std_logic_vector(4 downto 0); +-- PC_BYTES_LOADED_TST : out std_logic_vector(15 downto 0); +-- PC_SIZE_LEFT_TST : out std_logic_vector(31 downto 0); +-- PC_SUB_SIZE_TO_SAVE_TST : out std_logic_vector(31 downto 0); +-- PC_SUB_SIZE_LOADED_TST : out std_logic_vector(31 downto 0); +-- PC_SUB_BYTES_LOADED_TST : out std_logic_vector(31 downto 0); +-- PC_QUEUE_SIZE_TST : out std_logic_vector(31 downto 0); +-- PC_ACT_QUEUE_SIZE_TST : out std_logic_vector(31 downto 0); +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- FrameConstructor interface +-- FC_WR_EN_TST : out std_logic; +-- FC_DATA_TST : out std_logic_vector(7 downto 0); +-- FC_H_READY_TST : out std_logic; +-- FC_READY_TST : out std_logic; +-- FC_IP_SIZE_TST : out std_logic_vector(15 downto 0); +-- FC_UDP_SIZE_TST : out std_logic_vector(15 downto 0); +-- FC_IDENT_TST : out std_logic_vector(15 downto 0); +-- FC_FLAGS_OFFSET_TST : out std_logic_vector(15 downto 0); +-- FC_SOD_TST : out std_logic; +-- FC_EOD_TST : out std_logic; +-- FC_BSM_CONSTR_TST : out std_logic_vector(7 downto 0); +-- FC_BSM_TRANS_TST : out std_logic_vector(3 downto 0); +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- FrameTransmitter interface +-- FT_DATA_TST : out std_logic_vector(8 downto 0); +-- FT_TX_EMPTY_TST : out std_logic; +-- FT_START_OF_PACKET_TST : out std_logic; +-- FT_BSM_INIT_TST : out std_logic_vector(3 downto 0); +-- FT_BSM_MAC_TST : out std_logic_vector(3 downto 0); +-- FT_BSM_TRANS_TST : out std_logic_vector(3 downto 0); +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- MAC interface +-- MAC_HADDR_TST : out std_logic_vector(7 downto 0); +-- MAC_HDATA_TST : out std_logic_vector(7 downto 0); +-- MAC_HCS_TST : out std_logic; +-- MAC_HWRITE_TST : out std_logic; +-- MAC_HREAD_TST : out std_logic; +-- MAC_HREADY_TST : out std_logic; +-- MAC_HDATA_EN_TST : out std_logic; +-- MAC_FIFOAVAIL_TST : out std_logic; +-- MAC_FIFOEOF_TST : out std_logic; +-- MAC_FIFOEMPTY_TST : out std_logic; +-- MAC_TX_READ_TST : out std_logic; +-- MAC_TX_DONE_TST : out std_logic; +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- pcs and serdes +-- PCS_AN_LP_ABILITY_TST : out std_logic_vector(15 downto 0); +-- PCS_AN_COMPLETE_TST : out std_logic; +-- PCS_AN_PAGE_RX_TST : out std_logic; +-- ------------------------------------------------------------------------------------------- +-- ------------------------------------------------------------------------------------------- +-- -- debug ports +-- ANALYZER_DEBUG_OUT : out std_logic_vector(63 downto 0) +-- ); +-- end component; -- 2.43.0