From d259b40617869c28f4752ee718701fef73daf9f0 Mon Sep 17 00:00:00 2001 From: Cahit Date: Tue, 3 Nov 2015 10:08:46 +0100 Subject: [PATCH] corrected constraint name --- pinout/basic_constraints.lpf | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/pinout/basic_constraints.lpf b/pinout/basic_constraints.lpf index 785d385..0d17389 100644 --- a/pinout/basic_constraints.lpf +++ b/pinout/basic_constraints.lpf @@ -23,7 +23,7 @@ FREQUENCY PORT CLK_EXT_PLL_RIGHT 200 MHz; #If these signals do not exist, somebody messed around with the design... -MULTICYCLE TO CELL "THE_TOOLS/THE_SPI_RELOAD_THE_SPI_MASTER_THE_SPI_SLIM_tx_sreg_oregio*" 20 ns; +MULTICYCLE TO CELL "THE_TOOLS/THE_SPI_RELOAD_THE_SPI_MASTER_THE_SPI_SLIM_tx_sreg_oregio[*]" 20 ns; MULTICYCLE TO CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/final_reset*" 20 ns; MULTICYCLE FROM CELL "THE_CLOCK_RESET/gen_norecov_clock.clear_n_i" 20 ns; MULTICYCLE TO CELL "THE_CLOCK_RESET/THE_RESET_HANDLER/trb_reset_pulse*" 20 ns; @@ -59,4 +59,4 @@ BLOCK PATH FROM PORT "TEMPSENS"; BLOCK PATH TO PORT "TESTLINE"; PROHIBIT PRIMARY NET "ENPIRION_CLOCK_c" ; -PROHIBIT SECONDARY NET "ENPIRION_CLOCK_c" ; \ No newline at end of file +PROHIBIT SECONDARY NET "ENPIRION_CLOCK_c" ; -- 2.43.0