From d398b73e4dc2fb227ed15f86558edf75f0dd82a2 Mon Sep 17 00:00:00 2001 From: Cahit Date: Thu, 6 Mar 2014 10:38:21 +0100 Subject: [PATCH] coarse counter reset bit explanation --- trb3/TdcSlowControl.tex | 74 +++++++++++++++++++++++++---------------- 1 file changed, 45 insertions(+), 29 deletions(-) diff --git a/trb3/TdcSlowControl.tex b/trb3/TdcSlowControl.tex index 5fe68a3..64f4b38 100644 --- a/trb3/TdcSlowControl.tex +++ b/trb3/TdcSlowControl.tex @@ -1,4 +1,4 @@ -A set of control registers are assigned in order to access the basic controls, +A set of control registers are assigned in order to access the basic controls, edit the features and debug information of the TDC. A detailed explanation of the control registers are given in Table \ref{tab:tdcControlReg}. @@ -6,40 +6,56 @@ the control registers are given in Table \ref{tab:tdcControlReg}. \begin{center} \begin{tabularx}{\textwidth}{|c|l|c|L|} \hline - Address & \multicolumn{1}{c|}{Name} & Bits & \multicolumn{1}{c|}{Explanation}\\ + Address & \multicolumn{1}{c|}{Name} & Bits + & \multicolumn{1}{c|}{Explanation}\\ + \hline \hline - \multirow{14}{*}{0xc800} & \multirow{14}{*}{Basic controls} & 3-0 -& Enables different signals to the HPLA* output for debugging with logic -analyser (For more details see Table \ref{tab:tdcControlRegBasicLA}).\\ - & & 4 & Enables the \textit{Debug Mode}. Different statistics and debug words are sent after every trigger (see \ref{sec:tdcDebug}).\\ - & & 7-5 & reserved.\\ - & & 8 & Resets the internal counters (active high).\\ - & & 11-9 & reserved.\\ - & & 12 & Used to select the trigger mode. 0 - with trigger mode; 1 - trigger-less mode (For more details see \ref{sec:tdcTrigWin}).\\ - & & 27-13 & reserved.\\ - & & 31-28 -& Used to divide the calibration hit frequency.\\&&& $Freq_{hit}=1.6~MHz/2^n$\\ - + \multirow{19}{*}{0xc800} & \multirow{19}{*}{Basic controls} + & 3-0 & Enables different signals to the HPLA* output for debugging +with logic analyser (For more details see Table +\ref{tab:tdcControlRegBasicLA}).\\ + & & 4 & Enables the \textit{Debug Mode}. Different statistics and debug +words are sent after every trigger (see \ref{sec:tdcDebug}).\\ + & & 7-5 & reserved.\\ + & & 8 & Resets the internal counters (active high).\\ + & & 11-9 & reserved.\\ + & & 12 & Used to select the trigger mode. \textbf{0:} with trigger mode; +\textbf{1:} trigger-less mode (For more details see \ref{sec:tdcTrigWin}).\\ + & & 13 & Used to reset the coarse counters. Setting this bit signals for +the coarse counter reset but the action will take place with the arrival of the +next valid trigger in order to synchronise the coarse counters in a large +system.\\ + & & 27-14 & reserved.\\ + & & 31-28 & Used to divide the calibration hit frequency.\\ + & & & $Freq_{hit}=1.6~MHz/2^n$\\ \hline - \multirow{10}{*}{0xc801} & \multirow{10}{*}{Trigger window} & 10-0 & Defines the trigger window width before the trigger with granularity of 5~ns. Minimum value is x"000".\\ - & & 15-11 & reserved.\\ - & & 26-16 & Defines the trigger window width after the trigger with granularity of 5~ns. \textbf{ATTENTION! Minimum value can be set is x"00f".}\\ - & & 30-27 & reserved.\\ - & & 31 & Enables trigger window feature.\\ + \multirow{10}{*}{0xc801} & \multirow{10}{*}{Trigger window} + & 10-0 & Defines the trigger window width before the trigger with +granularity of 5~ns. Minimum value is x"000".\\ + & & 15-11 & reserved.\\ + & & 26-16 & Defines the trigger window width after the trigger with +granularity of 5~ns. \textbf{ATTENTION! Minimum value can be set is x"00f".}\\ + & & 30-27 & reserved.\\ + & & 31 & Enables trigger window feature.\\ + \hline - - 0xc802 & Channel enable 1 & 31-0 & Enable signals for the channels 1-32.\\ + 0xc802 & Channel enable 1 + & 31-0 & Enable signals for the channels 1-32.\\ + \hline - 0xc803 & Channel enable 2 & 31-0 & Enable signals for the channels 33-64.\\ + 0xc803 & Channel enable 2 + & 31-0 & Enable signals for the channels 33-64.\\ + \hline - \multirow{8}{*}{0xc804} & \multirow{8}{*}{Data transfer limit} & 7-0 - & Defines \# of data words per channel to be read-out. Set it to 0x80 - for full readout. \textbf{ATTENTION! This conrol is implemented only for - debug readons. With this limit the earliest hit information is read -out. If you wish to get hits close to the trigger (latest hits) please use -the trigger window feature.}\\ - & & 31-8 & reserved.\\ + \multirow{8}{*}{0xc804} & \multirow{8}{*}{Data transfer limit} + & 7-0 & Defines \# of data words per channel to be read-out. Set it to +0x80 for full readout. \textbf{ATTENTION! This conrol is implemented only for +debug readons. With this limit the earliest hit information is read out. If you +wish to get hits close to the trigger (latest hits) please use the trigger +window feature.}\\ + & & 31-8 & reserved.\\ + \hline % \multirow{3}{*}{0xc805} & \multirow{3}{*}{TDC channel trigger} & 6-0 & The input signal on the defined channel is forwarded to the CTS for triggering.\\ % & & 31-7 -- 2.43.0