From d92ac641f0714f8e2c31114286d52da63fe3f8ea Mon Sep 17 00:00:00 2001 From: "hadaq@Frankfurt" Date: Sun, 27 Oct 2013 23:26:29 +0100 Subject: [PATCH] pci_test always on now --- pexor/kernel-module/pexor_trb.c | 120 ++++++++++++++++---------------- 1 file changed, 60 insertions(+), 60 deletions(-) diff --git a/pexor/kernel-module/pexor_trb.c b/pexor/kernel-module/pexor_trb.c index db32b0d..bdf87da 100644 --- a/pexor/kernel-module/pexor_trb.c +++ b/pexor/kernel-module/pexor_trb.c @@ -20,18 +20,18 @@ #include "pexor_user.h" #include "pexor_trb.h" -#define PEXOR_DEBUGPRINT +//#define PEXOR_DEBUGPRINT //#define PEXOR_TRB_DEBUG #ifdef PEXOR_DEBUGPRINT -#define pexor_dbg( args... ) \ +#define pexor_dbg( args... ) \ printk( args ); #else #define pexor_dbg( args... ) ; #endif -#define pexor_msg( args... ) \ +#define pexor_msg( args... ) \ printk( args ); /* ---------------------------------------------------------------------- */ @@ -301,48 +301,48 @@ void test_pci(struct pci_dev* dev) /*********** Test the address regions*/ for (bar = 0; bar < 6; bar++) { - pexor_dbg(KERN_NOTICE "Resource %d start=%x\n", bar, - (unsigned)pci_resource_start(dev, bar)); + printk(KERN_NOTICE "Resource %d start=%x\n", bar, + (unsigned)pci_resource_start(dev, bar)); - pexor_dbg(KERN_NOTICE "Resource %d end=%x\n", bar, - (unsigned)pci_resource_end(dev, bar)); + printk(KERN_NOTICE "Resource %d end=%x\n", bar, + (unsigned)pci_resource_end(dev, bar)); - pexor_dbg(KERN_NOTICE "Resource %d len=%x\n", bar, - (unsigned)pci_resource_len(dev, bar)); + printk(KERN_NOTICE "Resource %d len=%x\n", bar, + (unsigned)pci_resource_len(dev, bar)); - pexor_dbg(KERN_NOTICE "Resource %d flags=%x\n", bar, - (unsigned)pci_resource_flags(dev, bar)); + printk(KERN_NOTICE "Resource %d flags=%x\n", bar, + (unsigned)pci_resource_flags(dev, bar)); if ((pci_resource_flags(dev, bar) & IORESOURCE_IO)) { /* Ressource im IO-Adressraum */ - pexor_dbg(KERN_NOTICE " - resource is IO\n"); + printk(KERN_NOTICE " - resource is IO\n"); } if ((pci_resource_flags(dev, bar) & IORESOURCE_MEM)) { - pexor_dbg(KERN_NOTICE " - resource is MEM\n"); + printk(KERN_NOTICE " - resource is MEM\n"); } if ((pci_resource_flags(dev, bar) & PCI_BASE_ADDRESS_SPACE_IO)) { - pexor_dbg(KERN_NOTICE " - resource is PCI IO\n"); + printk(KERN_NOTICE " - resource is PCI IO\n"); } if ((pci_resource_flags(dev, bar) & PCI_BASE_ADDRESS_SPACE_MEMORY)) { - pexor_dbg(KERN_NOTICE " - resource is PCI MEM\n"); + printk(KERN_NOTICE " - resource is PCI MEM\n"); } if ((pci_resource_flags(dev, bar) & PCI_BASE_ADDRESS_MEM_PREFETCH)) { - pexor_dbg(KERN_NOTICE " - resource prefetch bit is set \n"); + printk(KERN_NOTICE " - resource prefetch bit is set \n"); } if ((pci_resource_flags(dev, bar) & PCI_BASE_ADDRESS_MEM_TYPE_64)) { - pexor_dbg(KERN_NOTICE " - resource is 64bit address \n"); + printk(KERN_NOTICE " - resource is 64bit address \n"); } if ((pci_resource_flags(dev, bar) & PCI_BASE_ADDRESS_MEM_TYPE_32)) { - pexor_dbg(KERN_NOTICE " - resource is 32bit address \n"); + printk(KERN_NOTICE " - resource is 32bit address \n"); } if ((pci_resource_flags(dev, bar) & IORESOURCE_PREFETCH)) { - pexor_dbg(KERN_NOTICE " - resource is prefetchable \n"); + printk(KERN_NOTICE " - resource is prefetchable \n"); } if ((pci_resource_flags(dev, bar) & PCI_BASE_ADDRESS_MEM_PREFETCH)) { - pexor_dbg(KERN_NOTICE " - resource is PCI mem prefetchable \n"); + printk(KERN_NOTICE " - resource is PCI mem prefetchable \n"); } if ((pci_resource_flags(dev, bar) & PCI_BASE_ADDRESS_MEM_TYPE_1M)) { - pexor_dbg(KERN_NOTICE " - resource is PCI memtype below 1M \n"); + printk(KERN_NOTICE " - resource is PCI memtype below 1M \n"); } } @@ -350,39 +350,39 @@ void test_pci(struct pci_dev* dev) pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffffffff); pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &base); pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, originalvalue); - pexor_dbg("size of base address 0: %i\n", ~base + 1); + printk("size of base address 0: %i\n", ~base + 1); pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &originalvalue); pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0xffffffff); pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &base); pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, originalvalue); - pexor_dbg("size of base address 1: %i\n", ~base + 1); + printk("size of base address 1: %i\n", ~base + 1); pci_read_config_dword(dev, PCI_BASE_ADDRESS_2, &originalvalue); pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, 0xffffffff); pci_read_config_dword(dev, PCI_BASE_ADDRESS_2, &base); pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, originalvalue); - pexor_dbg("size of base address 2: %i\n", ~base + 1); + printk("size of base address 2: %i\n", ~base + 1); pci_read_config_dword(dev, PCI_BASE_ADDRESS_3, &originalvalue); pci_write_config_dword(dev, PCI_BASE_ADDRESS_3, 0xffffffff); pci_read_config_dword(dev, PCI_BASE_ADDRESS_3, &base); pci_write_config_dword(dev, PCI_BASE_ADDRESS_3, originalvalue); - pexor_dbg("size of base address 3: %i\n", ~base + 1); + printk("size of base address 3: %i\n", ~base + 1); /* Tests of configuration/status register */ pci_read_config_word(dev, PCI_COMMAND, &comstat); - pexor_dbg("\n**** Command register is: %d\n", comstat); + printk("\n**** Command register is: %d\n", comstat); pci_read_config_word(dev, PCI_STATUS, &comstat); - pexor_dbg("\n**** Status register is: %d\n", comstat); + printk("\n**** Status register is: %d\n", comstat); pci_read_config_byte(dev, PCI_HEADER_TYPE, &typ); - pexor_dbg("\n**** Header type is: %d\n", typ); + printk("\n**** Header type is: %d\n", typ); /* Test Interrupts */ pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &typ); - pexor_dbg("\n**** Interrupt Line is: %d\n", typ); + printk("\n**** Interrupt Line is: %d\n", typ); } void cleanup_device(struct pexor_privdata* priv) @@ -420,18 +420,18 @@ void cleanup_device(struct pexor_privdata* priv) if (priv->bases[j] == 0) continue; if ((pci_resource_flags(pcidev, j) & IORESOURCE_IO)) { - pexor_dbg(KERN_NOTICE " releasing IO region at:%lx -len:%lx \n", - priv->bases[j], priv->reglen[j]); + printk(KERN_NOTICE " releasing IO region at:%lx -len:%lx \n", + priv->bases[j], priv->reglen[j]); release_region(priv->bases[j], priv->reglen[j]); } else { if (priv->iomem[j] != 0) { - pexor_dbg(KERN_NOTICE - " unmapping virtual MEM region at:%lx -len:%lx \n", - (unsigned long)priv->iomem[j], priv->reglen[j]); + printk(KERN_NOTICE + " unmapping virtual MEM region at:%lx -len:%lx \n", + (unsigned long)priv->iomem[j], priv->reglen[j]); iounmap(priv->iomem[j]); } - pexor_dbg(KERN_NOTICE " releasing MEM region at:%lx -len:%lx \n", - priv->bases[j], priv->reglen[j]); + printk(KERN_NOTICE " releasing MEM region at:%lx -len:%lx \n", + priv->bases[j], priv->reglen[j]); release_mem_region(priv->bases[j], priv->reglen[j]); } priv->bases[j] = 0; @@ -486,8 +486,8 @@ void set_pexor(struct dev_pexor* pg, pg->dma_debug2 = (u32* ) (membase + (0x705 << 2)); pg->init_done = 0x1; - pexor_dbg(KERN_NOTICE "** Set pexor structure %lx.\n", - (long unsigned int)pg); + printk(KERN_NOTICE "** Set pexor structure %lx.\n", + (long unsigned int)pg); } static int probe(struct pci_dev* dev, @@ -503,13 +503,13 @@ static int probe(struct pci_dev* dev, err); return -ENODEV; } - pexor_dbg(KERN_NOTICE "PEXOR Device is enabled.\n"); + printk(KERN_NOTICE "PEXOR Device is enabled.\n"); /* Set Memory-Write-Invalidate support */ if (!pci_set_mwi(dev)) { - pexor_dbg(KERN_NOTICE "MWI enabled.\n"); + printk(KERN_NOTICE "MWI enabled.\n"); } else { - pexor_dbg(KERN_NOTICE "MWI not supported.\n"); + printk(KERN_NOTICE "MWI not supported.\n"); } pci_set_master(dev); /* NOTE: DMA worked without, but maybe depends on BIOS */ @@ -537,40 +537,40 @@ static int probe(struct pci_dev* dev, continue; if ((pci_resource_flags(dev, ix) & IORESOURCE_IO)) { - pexor_dbg(KERN_NOTICE " - Requesting io ports for bar %d\n", ix); + printk(KERN_NOTICE " - Requesting io ports for bar %d\n", ix); if (request_region(privdata->bases[ix], privdata->reglen[ix], dev->dev.kobj.name) == NULL) { - pexor_dbg(KERN_ERR - "I/O address conflict at bar %d for device \"%s\"\n", ix, - dev->dev.kobj.name); + printk(KERN_ERR + "I/O address conflict at bar %d for device \"%s\"\n", ix, + dev->dev.kobj.name); cleanup_device(privdata); return -EIO; } - pexor_dbg("requested ioport at %lx with length %lx\n", - privdata->bases[ix], privdata->reglen[ix]); + printk("requested ioport at %lx with length %lx\n", + privdata->bases[ix], privdata->reglen[ix]); } else if ((pci_resource_flags(dev, ix) & IORESOURCE_MEM)) { - pexor_dbg(KERN_NOTICE " - Requesting memory region for bar %d\n", ix); + printk(KERN_NOTICE " - Requesting memory region for bar %d\n", ix); if (request_mem_region(privdata->bases[ix], privdata->reglen[ix], dev->dev.kobj.name) == NULL) { - pexor_dbg(KERN_ERR - "Memory address conflict at bar %d for device \"%s\"\n", ix, - dev->dev.kobj.name); + printk(KERN_ERR + "Memory address conflict at bar %d for device \"%s\"\n", ix, + dev->dev.kobj.name); cleanup_device(privdata); return -EIO; } - pexor_dbg("requested memory at %lx with length %lx\n", - privdata->bases[ix], privdata->reglen[ix]); + printk("requested memory at %lx with length %lx\n", + privdata->bases[ix], privdata->reglen[ix]); privdata->iomem[ix] = ioremap_nocache(privdata->bases[ix], privdata->reglen[ix]); if (privdata->iomem[ix] == NULL) { - pexor_dbg(KERN_ERR - "Could not remap memory at bar %d for device \"%s\"\n", ix, - dev->dev.kobj.name); + printk(KERN_ERR + "Could not remap memory at bar %d for device \"%s\"\n", ix, + dev->dev.kobj.name); cleanup_device(privdata); return -EIO; } - pexor_dbg("remapped memory to %lx with length %lx\n", - (unsigned long)privdata->iomem[ix], privdata->reglen[ix]); + printk("remapped memory to %lx with length %lx\n", + (unsigned long)privdata->iomem[ix], privdata->reglen[ix]); } } //for set_pexor(&(privdata->pexor), privdata->iomem[0], privdata->bases[0]); @@ -669,7 +669,7 @@ int pexor_open(struct inode* inode, struct file* filp) int pexor_release(struct inode* inode, struct file* filp) { - pexor_dbg(KERN_NOTICE "** starting pexor_release...\n"); + printk(KERN_NOTICE "** starting pexor_release...\n"); return 0; } @@ -811,7 +811,7 @@ int pexor_mmap(struct file* filp, } -#define iowrite32_mb( args... ) \ +#define iowrite32_mb( args... ) \ iowrite32( args ); wmb(); int pexor_ioctl_read_register(struct pexor_privdata* priv, -- 2.43.0