From d97f108de967179e2ccf53d63f8cdb1703ac7ac7 Mon Sep 17 00:00:00 2001 From: Tobias Weber Date: Thu, 19 Jul 2018 10:44:18 +0200 Subject: [PATCH] Moving source files to subfolders. --- .../Mupix8/sources/{ => Datapath}/Arbiter.vhd | 0 .../sources/{ => Datapath}/CircularMemory.vhd | 0 .../Mupix8/sources/{ => Datapath}/DataMux.vhd | 0 .../{ => Datapath}/DataMuxWithConversion.vhd | 0 .../sources/{ => Datapath}/Gray2Binary.vhd | 0 .../{ => Datapath}/LinkSynchronizer.vhd | 0 .../{ => Datapath}/MuPixDataLink_new.vhd | 0 .../sources/{ => Datapath}/MuPixUnpacker.vhd | 0 .../sources/{ => Datapath}/MupixDataLink.vhd | 0 .../{ => Datapath}/MupixTRBReadout.vhd | 0 .../{ => Datapath}/PixelAddressDecode.vhd | 0 .../{ => Datapath}/ReadoutController.vhd | 0 .../sources/{ => Datapath}/ResetHandler.vhd | 0 .../sources/{ => Datapath}/TriggerHandler.vhd | 0 mupix/Mupix8/sources/MupixBoard.vhd | 27 ++++++++++++------- .../{ => Simulation}/DatasourceSelector.vhd | 0 .../{ => Simulation}/FrameGeneratorMux.vhd | 0 .../sources/{ => Simulation}/Generator3.vhd | 0 .../sources/Simulation/LinkSimulation.vhd | 19 +++++++++---- .../sources/{ => SlowControl}/ADS1018SPI.vhd | 0 .../sources/{ => SlowControl}/LTC1658SPI.vhd | 0 .../{ => SlowControl}/MupixBoardDAC.vhd | 0 .../{ => SlowControl}/PixelControl.vhd | 0 .../{ => SlowControl}/TestpulseGenerator.vhd | 0 .../sources/{ => Utility}/BlockMemory.vhd | 0 mupix/Mupix8/sources/{ => Utility}/CRC.vhd | 0 mupix/Mupix8/sources/{ => Utility}/FIFO.vhd | 0 .../sources/{ => Utility}/GrayCounter.vhd | 0 .../sources/{ => Utility}/GrayCounter2.vhd | 0 .../sources/{ => Utility}/Histogram.vhd | 0 .../sources/{ => Utility}/HitbusHistogram.vhd | 0 .../{ => Utility}/InputSynchronizer.vhd | 0 .../sources/{ => Utility}/SignalDelay.vhd | 0 .../sources/{ => Utility}/SortingCell.vhd | 0 .../sources/{ => Utility}/SortingNetwork.vhd | 0 35 files changed, 32 insertions(+), 14 deletions(-) rename mupix/Mupix8/sources/{ => Datapath}/Arbiter.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/CircularMemory.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/DataMux.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/DataMuxWithConversion.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/Gray2Binary.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/LinkSynchronizer.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/MuPixDataLink_new.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/MuPixUnpacker.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/MupixDataLink.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/MupixTRBReadout.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/PixelAddressDecode.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/ReadoutController.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/ResetHandler.vhd (100%) rename mupix/Mupix8/sources/{ => Datapath}/TriggerHandler.vhd (100%) rename mupix/Mupix8/sources/{ => Simulation}/DatasourceSelector.vhd (100%) rename mupix/Mupix8/sources/{ => Simulation}/FrameGeneratorMux.vhd (100%) rename mupix/Mupix8/sources/{ => Simulation}/Generator3.vhd (100%) rename mupix/Mupix8/sources/{ => SlowControl}/ADS1018SPI.vhd (100%) rename mupix/Mupix8/sources/{ => SlowControl}/LTC1658SPI.vhd (100%) rename mupix/Mupix8/sources/{ => SlowControl}/MupixBoardDAC.vhd (100%) rename mupix/Mupix8/sources/{ => SlowControl}/PixelControl.vhd (100%) rename mupix/Mupix8/sources/{ => SlowControl}/TestpulseGenerator.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/BlockMemory.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/CRC.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/FIFO.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/GrayCounter.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/GrayCounter2.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/Histogram.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/HitbusHistogram.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/InputSynchronizer.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/SignalDelay.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/SortingCell.vhd (100%) rename mupix/Mupix8/sources/{ => Utility}/SortingNetwork.vhd (100%) diff --git a/mupix/Mupix8/sources/Arbiter.vhd b/mupix/Mupix8/sources/Datapath/Arbiter.vhd similarity index 100% rename from mupix/Mupix8/sources/Arbiter.vhd rename to mupix/Mupix8/sources/Datapath/Arbiter.vhd diff --git a/mupix/Mupix8/sources/CircularMemory.vhd b/mupix/Mupix8/sources/Datapath/CircularMemory.vhd similarity index 100% rename from mupix/Mupix8/sources/CircularMemory.vhd rename to mupix/Mupix8/sources/Datapath/CircularMemory.vhd diff --git a/mupix/Mupix8/sources/DataMux.vhd b/mupix/Mupix8/sources/Datapath/DataMux.vhd similarity index 100% rename from mupix/Mupix8/sources/DataMux.vhd rename to mupix/Mupix8/sources/Datapath/DataMux.vhd diff --git a/mupix/Mupix8/sources/DataMuxWithConversion.vhd b/mupix/Mupix8/sources/Datapath/DataMuxWithConversion.vhd similarity index 100% rename from mupix/Mupix8/sources/DataMuxWithConversion.vhd rename to mupix/Mupix8/sources/Datapath/DataMuxWithConversion.vhd diff --git a/mupix/Mupix8/sources/Gray2Binary.vhd b/mupix/Mupix8/sources/Datapath/Gray2Binary.vhd similarity index 100% rename from mupix/Mupix8/sources/Gray2Binary.vhd rename to mupix/Mupix8/sources/Datapath/Gray2Binary.vhd diff --git a/mupix/Mupix8/sources/LinkSynchronizer.vhd b/mupix/Mupix8/sources/Datapath/LinkSynchronizer.vhd similarity index 100% rename from mupix/Mupix8/sources/LinkSynchronizer.vhd rename to mupix/Mupix8/sources/Datapath/LinkSynchronizer.vhd diff --git a/mupix/Mupix8/sources/MuPixDataLink_new.vhd b/mupix/Mupix8/sources/Datapath/MuPixDataLink_new.vhd similarity index 100% rename from mupix/Mupix8/sources/MuPixDataLink_new.vhd rename to mupix/Mupix8/sources/Datapath/MuPixDataLink_new.vhd diff --git a/mupix/Mupix8/sources/MuPixUnpacker.vhd b/mupix/Mupix8/sources/Datapath/MuPixUnpacker.vhd similarity index 100% rename from mupix/Mupix8/sources/MuPixUnpacker.vhd rename to mupix/Mupix8/sources/Datapath/MuPixUnpacker.vhd diff --git a/mupix/Mupix8/sources/MupixDataLink.vhd b/mupix/Mupix8/sources/Datapath/MupixDataLink.vhd similarity index 100% rename from mupix/Mupix8/sources/MupixDataLink.vhd rename to mupix/Mupix8/sources/Datapath/MupixDataLink.vhd diff --git a/mupix/Mupix8/sources/MupixTRBReadout.vhd b/mupix/Mupix8/sources/Datapath/MupixTRBReadout.vhd similarity index 100% rename from mupix/Mupix8/sources/MupixTRBReadout.vhd rename to mupix/Mupix8/sources/Datapath/MupixTRBReadout.vhd diff --git a/mupix/Mupix8/sources/PixelAddressDecode.vhd b/mupix/Mupix8/sources/Datapath/PixelAddressDecode.vhd similarity index 100% rename from mupix/Mupix8/sources/PixelAddressDecode.vhd rename to mupix/Mupix8/sources/Datapath/PixelAddressDecode.vhd diff --git a/mupix/Mupix8/sources/ReadoutController.vhd b/mupix/Mupix8/sources/Datapath/ReadoutController.vhd similarity index 100% rename from mupix/Mupix8/sources/ReadoutController.vhd rename to mupix/Mupix8/sources/Datapath/ReadoutController.vhd diff --git a/mupix/Mupix8/sources/ResetHandler.vhd b/mupix/Mupix8/sources/Datapath/ResetHandler.vhd similarity index 100% rename from mupix/Mupix8/sources/ResetHandler.vhd rename to mupix/Mupix8/sources/Datapath/ResetHandler.vhd diff --git a/mupix/Mupix8/sources/TriggerHandler.vhd b/mupix/Mupix8/sources/Datapath/TriggerHandler.vhd similarity index 100% rename from mupix/Mupix8/sources/TriggerHandler.vhd rename to mupix/Mupix8/sources/Datapath/TriggerHandler.vhd diff --git a/mupix/Mupix8/sources/MupixBoard.vhd b/mupix/Mupix8/sources/MupixBoard.vhd index 3de7ed7..e3c5590 100644 --- a/mupix/Mupix8/sources/MupixBoard.vhd +++ b/mupix/Mupix8/sources/MupixBoard.vhd @@ -339,12 +339,21 @@ architecture Behavioral of MupixBoard8 is signal fifo_full_serdes_i : std_logic_vector(c_links - 1 downto 0); signal fifo_data_serdes_i : std_logic_vector(c_mupixhitsize*c_links - 1 downto 0); + signal reset_reg : std_logic := '0'; + begin -- Behavioral ------------------------------------------------------------------------------- -- Port Maps ------------------------------------------------------------------------------- + register_reset: process (clk) is + begin -- process register_reset + if rising_edge(clk) then -- rising clock edge + reset_reg <= reset; + end if; + end process register_reset; + THE_BUS_HANDLER : trb_net16_regio_bus_handler generic map( PORT_NUMBER => NUM_PORTS, @@ -371,7 +380,7 @@ begin -- Behavioral ) port map( CLK => CLK, - RESET => RESET, + RESET => reset_reg, DAT_ADDR_IN => REGIO_ADDR_IN, DAT_DATA_IN => REGIO_DATA_IN, @@ -404,7 +413,7 @@ begin -- Behavioral port map( clk_in => clk, fast_clk_in => fast_clk, - reset => reset, + reset => reset_reg, ctrl_dout => ctrl_dout, spi_dout_adc => spi_dout_adc, spi_dout_dac => spi_dout_dac, @@ -449,7 +458,7 @@ begin -- Behavioral ) port map( clk => clk, - reset => reset, + reset => reset_reg, mupixslctrl => mupixslctrl_i, ctrl_dout => ctrl_dout_sync, SLV_READ_IN => slv_read(1), @@ -472,7 +481,7 @@ begin -- Behavioral boardcontrol_1 : entity work.MupixBoardDAC port map( clk => clk, - reset => reset, + reset => reset_reg, spi_dout_dac => spi_dout_dac_sync, dac4_dout => dac4_dout_sync, spi_dout_adc => spi_dout_adc_sync, @@ -522,7 +531,7 @@ begin -- Behavioral ) port map( clk => clk, - rst => reset, + rst => reset_reg, fifo_empty => mux_fifo_empty, fifo_full => mux_fifo_full, fifo_datain => mux_fifo_data, @@ -544,7 +553,7 @@ begin -- Behavioral triggerhandler1 : entity work.TriggerHandler port map( CLK_IN => clk, - RESET_IN => reset, + RESET_IN => reset_reg, TIMING_TRIGGER_IN => TIMING_TRG_IN, LVL1_TRG_DATA_VALID_IN => LVL1_TRG_DATA_VALID_IN, LVL1_VALID_TIMING_TRG_IN => LVL1_VALID_TIMING_TRG_IN, @@ -579,7 +588,7 @@ begin -- Behavioral ) port map( clk => clk, - reset => reset, + reset => reset_reg, serdes_data => fifo_data_serdes_i, serdes_fifo_full => fifo_full_serdes_i, serdes_fifo_empty => fifo_empty_serdes_i, @@ -603,8 +612,8 @@ begin -- Behavioral port map( sysclk => clk, dataclk => data_clk, - rst => reset, - clear => reset, + rst => reset_reg, + clear => reset_reg, mupix_data => mupix_data, fifo_rden => fifo_rden_serdes_i, fifo_empty => fifo_empty_serdes_i, diff --git a/mupix/Mupix8/sources/DatasourceSelector.vhd b/mupix/Mupix8/sources/Simulation/DatasourceSelector.vhd similarity index 100% rename from mupix/Mupix8/sources/DatasourceSelector.vhd rename to mupix/Mupix8/sources/Simulation/DatasourceSelector.vhd diff --git a/mupix/Mupix8/sources/FrameGeneratorMux.vhd b/mupix/Mupix8/sources/Simulation/FrameGeneratorMux.vhd similarity index 100% rename from mupix/Mupix8/sources/FrameGeneratorMux.vhd rename to mupix/Mupix8/sources/Simulation/FrameGeneratorMux.vhd diff --git a/mupix/Mupix8/sources/Generator3.vhd b/mupix/Mupix8/sources/Simulation/Generator3.vhd similarity index 100% rename from mupix/Mupix8/sources/Generator3.vhd rename to mupix/Mupix8/sources/Simulation/Generator3.vhd diff --git a/mupix/Mupix8/sources/Simulation/LinkSimulation.vhd b/mupix/Mupix8/sources/Simulation/LinkSimulation.vhd index 05d2502..893a058 100644 --- a/mupix/Mupix8/sources/Simulation/LinkSimulation.vhd +++ b/mupix/Mupix8/sources/Simulation/LinkSimulation.vhd @@ -78,8 +78,17 @@ architecture rtl of LinkSimulation is signal words_i : std_logic_vector(4 downto 0) := "00100"; signal slowdown_i : std_logic_vector(15 downto 0) := x"FF0A"; + signal reset_reg : std_logic := '0'; + begin -- architecture rtl + register_reset: process (trbclk) is + begin -- process register_reset + if rising_edge(trbclk) then -- rising clock edge + reset_reg <= reset; + end if; + end process register_reset; + mupix_sim_pll_1 : entity work.mupix_sim_pll port map ( CLK => sendclk, @@ -90,7 +99,7 @@ begin -- architecture rtl MupixStateMachine_1 : entity work.MupixStateMachine port map ( clk => data_clk_i, - reset => reset, + reset => reset_reg, words => words_i, slowdown => slowdown_i, wr_en => fifo_wren_i, @@ -106,8 +115,8 @@ begin -- architecture rtl RdClock => sim_clk_i, WrEn => fifo_wren_i, RdEn => fifo_rden_i, - Reset => reset, - RPReset => reset, + Reset => reset_reg, + RPReset => reset_reg, Q => fifo_data_out, Empty => fifo_empty_i, Full => open); @@ -115,7 +124,7 @@ begin -- architecture rtl DataOutput_1 : entity work.DataOutput port map ( clk => sim_clk_i, - reset => reset, + reset => reset_reg, datain => fifo_data_out, empty => fifo_empty_i, rden => fifo_rden_i, @@ -124,7 +133,7 @@ begin -- architecture rtl data_output_pipe : process (sim_clk_i) is begin -- process data_output_pipe if rising_edge(sim_clk_i) then -- rising clock edge - if reset = '1' then -- synchronous reset (active high) + if reset_reg = '1' then -- synchronous reset (active high) data_out_reg <= (others => '0'); else data_out_reg <= data_out_i; diff --git a/mupix/Mupix8/sources/ADS1018SPI.vhd b/mupix/Mupix8/sources/SlowControl/ADS1018SPI.vhd similarity index 100% rename from mupix/Mupix8/sources/ADS1018SPI.vhd rename to mupix/Mupix8/sources/SlowControl/ADS1018SPI.vhd diff --git a/mupix/Mupix8/sources/LTC1658SPI.vhd b/mupix/Mupix8/sources/SlowControl/LTC1658SPI.vhd similarity index 100% rename from mupix/Mupix8/sources/LTC1658SPI.vhd rename to mupix/Mupix8/sources/SlowControl/LTC1658SPI.vhd diff --git a/mupix/Mupix8/sources/MupixBoardDAC.vhd b/mupix/Mupix8/sources/SlowControl/MupixBoardDAC.vhd similarity index 100% rename from mupix/Mupix8/sources/MupixBoardDAC.vhd rename to mupix/Mupix8/sources/SlowControl/MupixBoardDAC.vhd diff --git a/mupix/Mupix8/sources/PixelControl.vhd b/mupix/Mupix8/sources/SlowControl/PixelControl.vhd similarity index 100% rename from mupix/Mupix8/sources/PixelControl.vhd rename to mupix/Mupix8/sources/SlowControl/PixelControl.vhd diff --git a/mupix/Mupix8/sources/TestpulseGenerator.vhd b/mupix/Mupix8/sources/SlowControl/TestpulseGenerator.vhd similarity index 100% rename from mupix/Mupix8/sources/TestpulseGenerator.vhd rename to mupix/Mupix8/sources/SlowControl/TestpulseGenerator.vhd diff --git a/mupix/Mupix8/sources/BlockMemory.vhd b/mupix/Mupix8/sources/Utility/BlockMemory.vhd similarity index 100% rename from mupix/Mupix8/sources/BlockMemory.vhd rename to mupix/Mupix8/sources/Utility/BlockMemory.vhd diff --git a/mupix/Mupix8/sources/CRC.vhd b/mupix/Mupix8/sources/Utility/CRC.vhd similarity index 100% rename from mupix/Mupix8/sources/CRC.vhd rename to mupix/Mupix8/sources/Utility/CRC.vhd diff --git a/mupix/Mupix8/sources/FIFO.vhd b/mupix/Mupix8/sources/Utility/FIFO.vhd similarity index 100% rename from mupix/Mupix8/sources/FIFO.vhd rename to mupix/Mupix8/sources/Utility/FIFO.vhd diff --git a/mupix/Mupix8/sources/GrayCounter.vhd b/mupix/Mupix8/sources/Utility/GrayCounter.vhd similarity index 100% rename from mupix/Mupix8/sources/GrayCounter.vhd rename to mupix/Mupix8/sources/Utility/GrayCounter.vhd diff --git a/mupix/Mupix8/sources/GrayCounter2.vhd b/mupix/Mupix8/sources/Utility/GrayCounter2.vhd similarity index 100% rename from mupix/Mupix8/sources/GrayCounter2.vhd rename to mupix/Mupix8/sources/Utility/GrayCounter2.vhd diff --git a/mupix/Mupix8/sources/Histogram.vhd b/mupix/Mupix8/sources/Utility/Histogram.vhd similarity index 100% rename from mupix/Mupix8/sources/Histogram.vhd rename to mupix/Mupix8/sources/Utility/Histogram.vhd diff --git a/mupix/Mupix8/sources/HitbusHistogram.vhd b/mupix/Mupix8/sources/Utility/HitbusHistogram.vhd similarity index 100% rename from mupix/Mupix8/sources/HitbusHistogram.vhd rename to mupix/Mupix8/sources/Utility/HitbusHistogram.vhd diff --git a/mupix/Mupix8/sources/InputSynchronizer.vhd b/mupix/Mupix8/sources/Utility/InputSynchronizer.vhd similarity index 100% rename from mupix/Mupix8/sources/InputSynchronizer.vhd rename to mupix/Mupix8/sources/Utility/InputSynchronizer.vhd diff --git a/mupix/Mupix8/sources/SignalDelay.vhd b/mupix/Mupix8/sources/Utility/SignalDelay.vhd similarity index 100% rename from mupix/Mupix8/sources/SignalDelay.vhd rename to mupix/Mupix8/sources/Utility/SignalDelay.vhd diff --git a/mupix/Mupix8/sources/SortingCell.vhd b/mupix/Mupix8/sources/Utility/SortingCell.vhd similarity index 100% rename from mupix/Mupix8/sources/SortingCell.vhd rename to mupix/Mupix8/sources/Utility/SortingCell.vhd diff --git a/mupix/Mupix8/sources/SortingNetwork.vhd b/mupix/Mupix8/sources/Utility/SortingNetwork.vhd similarity index 100% rename from mupix/Mupix8/sources/SortingNetwork.vhd rename to mupix/Mupix8/sources/Utility/SortingNetwork.vhd -- 2.43.0