From dc442f9c82a2f4c2f0b2881f13d067e918da162b Mon Sep 17 00:00:00 2001 From: Cahit Date: Wed, 16 Apr 2014 21:31:14 +0200 Subject: [PATCH] unnecessary file removed from the project file --- cbmtof/cbmtof.prj | 1 - cbmtof/cbmtof.vhd | 8 ++++---- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/cbmtof/cbmtof.prj b/cbmtof/cbmtof.prj index 42da550..6cfc9c8 100644 --- a/cbmtof/cbmtof.prj +++ b/cbmtof/cbmtof.prj @@ -156,7 +156,6 @@ add_file -vhdl -lib "work" "currentRelease/Channel_200.vhd" add_file -vhdl -lib "work" "currentRelease/Encoder_304_Bit.vhd" add_file -vhdl -lib "work" "currentRelease/LogicAnalyser.vhd" add_file -vhdl -lib "work" "currentRelease/Readout.vhd" -#add_file -vhdl -lib "work" "currentRelease/ROM4_Encoder.vhd" add_file -vhdl -lib "work" "currentRelease/ROM_encoder_3.vhd" add_file -vhdl -lib "work" "currentRelease/ShiftRegisterSISO.vhd" add_file -vhdl -lib "work" "currentRelease/TDC.vhd" diff --git a/cbmtof/cbmtof.vhd b/cbmtof/cbmtof.vhd index 186b49b..ef8e332 100644 --- a/cbmtof/cbmtof.vhd +++ b/cbmtof/cbmtof.vhd @@ -501,7 +501,7 @@ begin -- I/O --------------------------------------------------------------------------- -- timing_trg_received_i <= SPARE_LINE(0); - timing_trg_received_i <= CLK_CM(0); + timing_trg_received_i <= CLK_CM(3); --------------------------------------------------------------------------- -- Bus Handler @@ -894,15 +894,15 @@ THE_SED : entity work.sedcheck THE_TDC : TDC generic map ( CHANNEL_NUMBER => NUM_TDC_CHANNELS, -- Number of TDC channels - STATUS_REG_NR => 20, -- Number of status regs + STATUS_REG_NR => 21, -- Number of status regs CONTROL_REG_NR => 6, -- Number of control regs - higher than 8 check tdc_ctrl_addr TDC_VERSION => TDC_VERSION, -- TDC version number DEBUG => c_YES, SIMULATION => c_NO) port map ( RESET => reset_i, - CLK_TDC => clk_200_i, -- Oscillator used for the time measurement --- CLK_TDC => CLK_EXT, -- External Clock used for the time measurement +-- CLK_TDC => clk_200_i, -- Oscillator used for the time measurement + CLK_TDC => CLK_EXT, -- External Clock used for the time measurement CLK_READOUT => clk_100_i, -- Clock for the readout REFERENCE_TIME => timing_trg_received_i, -- Reference time input HIT_IN => hit_in_i(NUM_TDC_CHANNELS-1 downto 1), -- Channel start signals -- 2.43.0