From dda76c695c1119cca5a479580e56f5ba63d5228a Mon Sep 17 00:00:00 2001 From: hadeshyp Date: Wed, 4 Aug 2010 16:05:05 +0000 Subject: [PATCH] *** empty log message *** --- etrax_interface.vhd | 8 +- .../trb_net16_med_ecp_sfp_gbe.vhd | 2 +- special/trb_net_reset_handler.vhd | 10 +- trb_net_components.vhd | 152 +++++++++--------- 4 files changed, 86 insertions(+), 86 deletions(-) diff --git a/etrax_interface.vhd b/etrax_interface.vhd index 73e4fed..9ebed91 100644 --- a/etrax_interface.vhd +++ b/etrax_interface.vhd @@ -123,7 +123,7 @@ begin etrax_trigger_pulse <= (last_BUSC(16) xor reg_BUSC(16)) and not delayed_internal_reset_i; - EXTERNAL_RESET <= internal_reset_i; + EXTERNAL_RESET <= internal_reset_i or delayed_internal_reset_i; ETRAX_BUS_BUSY <= '0' when ETRAX_RW_STATE_currentstate = IDLE else '1'; read_cycle <= saved_address(15); @@ -132,7 +132,7 @@ begin ETRAX_FPGA_COMUNICATION_CLOCK : process (CLK) begin if rising_edge(CLK) then - if internal_reset_i = '1' then + if delayed_internal_reset_i = '1' then ETRAX_RW_STATE_currentstate <= IDLE; else ETRAX_RW_STATE_currentstate <= ETRAX_RW_STATE_nextstate; @@ -199,7 +199,7 @@ begin REGISTER_ETRAX_BUS: process (CLK) begin if rising_edge(CLK) then - if internal_reset_i = '1' then + if delayed_internal_reset_i = '1' then saved_address <= (others => '0'); saved_data <= (others => '0'); elsif ETRAX_RW_STATE_currentstate = IDLE and etrax_trigger_pulse = '1' then @@ -228,7 +228,7 @@ begin ETRAX_DATA_BUS_CHOOSE : process (CLK) begin if rising_edge(CLK) then - if internal_reset_i = '1' then + if delayed_internal_reset_i = '1' then ETRAX_DATA_BUS_B(16 downto 0) <= "0"& x"0000"; elsif ETRAX_RW_STATE_currentstate = SEND_DATA_1 then ETRAX_DATA_BUS_B(15 downto 0) <= saved_data_fpga(31 downto 16); diff --git a/media_interfaces/trb_net16_med_ecp_sfp_gbe.vhd b/media_interfaces/trb_net16_med_ecp_sfp_gbe.vhd index 6afc9b9..cdb564b 100755 --- a/media_interfaces/trb_net16_med_ecp_sfp_gbe.vhd +++ b/media_interfaces/trb_net16_med_ecp_sfp_gbe.vhd @@ -491,7 +491,7 @@ THE_SFP_STATUS_SYNC: signal_sync WIDTH => 2 ) port map( - RESET => reset_i, + RESET => '0', D_IN(0) => sd_prsnt_n_in, D_IN(1) => sd_los_in, CLK0 => sysclk, diff --git a/special/trb_net_reset_handler.vhd b/special/trb_net_reset_handler.vhd index be8c588..8a9b59a 100644 --- a/special/trb_net_reset_handler.vhd +++ b/special/trb_net_reset_handler.vhd @@ -45,7 +45,7 @@ signal reset_buffer : std_logic; -- DO NOT USE THIS SIGNAL! signal trb_reset_buffer : std_logic; -- DO NOT USE THIS SIGNAL! signal reset_pulse : std_logic_vector(1 downto 0) := b"00"; signal trb_reset_pulse : std_logic_vector(1 downto 0) := b"00"; -signal comb_async_rst : std_logic; +signal comb_async_rst_n : std_logic; signal final_reset : std_logic_vector(1 downto 0) := b"11"; -- DO NOT USE THIS SIGNAL! attribute syn_preserve : boolean; @@ -53,14 +53,14 @@ attribute syn_preserve of async_sampler : signal is true; attribute syn_preserve of async_pulse : signal is true; attribute syn_preserve of reset : signal is true; attribute syn_preserve of reset_cnt : signal is true; -attribute syn_preserve of comb_async_rst : signal is true; +attribute syn_preserve of comb_async_rst_n : signal is true; begin ---------------------------------------------------------------- -- Combine all async reset sources: CLR, /CLR, PLL_LOCK ---------------------------------------------------------------- -comb_async_rst <= not clear_in and clear_n_in and pll_locked_in; +comb_async_rst_n <= not clear_in and clear_n_in and pll_locked_in; ---------------------------------------------------------------- -- sample the async reset line and react only on a long pulse @@ -68,7 +68,7 @@ comb_async_rst <= not clear_in and clear_n_in and pll_locked_in; THE_ASYNC_SAMPLER_PROC: process( clk_in ) begin if( rising_edge(clk_in) ) then - async_sampler(7 downto 0) <= async_sampler(6 downto 0) & comb_async_rst; + async_sampler(7 downto 0) <= async_sampler(6 downto 0) & comb_async_rst_n; async_pulse <= comb_async_pulse; end if; end process THE_ASYNC_SAMPLER_PROC; @@ -132,7 +132,7 @@ debug(11 downto 0) <= reset_cnt(11 downto 0); -- Output signals ---------------------------------------------------------------- debug_out <= debug; -clear_out <= not comb_async_rst; +clear_out <= not comb_async_rst_n; reset_out <= final_reset(1); end behavioral; diff --git a/trb_net_components.vhd b/trb_net_components.vhd index e0b2e22..3894bda 100644 --- a/trb_net_components.vhd +++ b/trb_net_components.vhd @@ -799,82 +799,82 @@ end component trb_net16_med_scm_sfp_gbe; -component trb_net16_gbe_buf is -generic( - DO_SIMULATION : integer range 0 to 1 := 1; - USE_125MHZ_EXTCLK : integer range 0 to 1 := 1 -); -port( - CLK : in std_logic; - TEST_CLK : in std_logic; -- only for simulation! - CLK_125_TX_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode - CLK_125_RX_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode - RESET : in std_logic; - GSR_N : in std_logic; - -- Debug - STAGE_STAT_REGS_OUT : out std_logic_vector(31 downto 0); - STAGE_CTRL_REGS_IN : in std_logic_vector(31 downto 0); - -- configuration interface - IP_CFG_START_IN : in std_logic; - IP_CFG_BANK_SEL_IN : in std_logic_vector(3 downto 0); - IP_CFG_DONE_OUT : out std_logic; - IP_CFG_MEM_ADDR_OUT : out std_logic_vector(7 downto 0); - IP_CFG_MEM_DATA_IN : in std_logic_vector(31 downto 0); - IP_CFG_MEM_CLK_OUT : out std_logic; - MR_RESET_IN : in std_logic; - MR_MODE_IN : in std_logic; - MR_RESTART_IN : in std_logic; - -- gk 29.03.10 - SLV_ADDR_IN : in std_logic_vector(7 downto 0); - SLV_READ_IN : in std_logic; - SLV_WRITE_IN : in std_logic; - SLV_BUSY_OUT : out std_logic; - SLV_ACK_OUT : out std_logic; - SLV_DATA_IN : in std_logic_vector(31 downto 0); - SLV_DATA_OUT : out std_logic_vector(31 downto 0); - -- gk 22.04.10 - -- registers setup interface - BUS_ADDR_IN : in std_logic_vector(7 downto 0); - BUS_DATA_IN : in std_logic_vector(31 downto 0); - BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 - BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 - BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 - BUS_ACK_OUT : out std_logic; -- gk 26.04.10 - -- gk 23.04.10 - LED_PACKET_SENT_OUT : out std_logic; - LED_AN_DONE_N_OUT : out std_logic; - -- CTS interface - CTS_NUMBER_IN : in std_logic_vector (15 downto 0); - CTS_CODE_IN : in std_logic_vector (7 downto 0); - CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); - CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); - CTS_START_READOUT_IN : in std_logic; - CTS_DATA_OUT : out std_logic_vector (31 downto 0); - CTS_DATAREADY_OUT : out std_logic; - CTS_READOUT_FINISHED_OUT : out std_logic; - CTS_READ_IN : in std_logic; - CTS_LENGTH_OUT : out std_logic_vector (15 downto 0); - CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0); - -- Data payload interface - FEE_DATA_IN : in std_logic_vector (15 downto 0); - FEE_DATAREADY_IN : in std_logic; - FEE_READ_OUT : out std_logic; - FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); - FEE_BUSY_IN : in std_logic; - --SFP Connection - SFP_RXD_P_IN : in std_logic; - SFP_RXD_N_IN : in std_logic; - SFP_TXD_P_OUT : out std_logic; - SFP_TXD_N_OUT : out std_logic; - SFP_REFCLK_P_IN : in std_logic; - SFP_REFCLK_N_IN : in std_logic; - SFP_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) - SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) - SFP_TXDIS_OUT : out std_logic; -- SFP disable - -- debug ports - ANALYZER_DEBUG_OUT : out std_logic_vector(63 downto 0) -); -end component; +-- component trb_net16_gbe_buf is +-- generic( +-- DO_SIMULATION : integer range 0 to 1 := 1; +-- USE_125MHZ_EXTCLK : integer range 0 to 1 := 1 +-- ); +-- port( +-- CLK : in std_logic; +-- TEST_CLK : in std_logic; -- only for simulation! +-- CLK_125_TX_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode +-- CLK_125_RX_IN : in std_logic; -- gk 28.04.01 used only in internal 125MHz clock mode +-- RESET : in std_logic; +-- GSR_N : in std_logic; +-- -- Debug +-- STAGE_STAT_REGS_OUT : out std_logic_vector(31 downto 0); +-- STAGE_CTRL_REGS_IN : in std_logic_vector(31 downto 0); +-- -- configuration interface +-- IP_CFG_START_IN : in std_logic; +-- IP_CFG_BANK_SEL_IN : in std_logic_vector(3 downto 0); +-- IP_CFG_DONE_OUT : out std_logic; +-- IP_CFG_MEM_ADDR_OUT : out std_logic_vector(7 downto 0); +-- IP_CFG_MEM_DATA_IN : in std_logic_vector(31 downto 0); +-- IP_CFG_MEM_CLK_OUT : out std_logic; +-- MR_RESET_IN : in std_logic; +-- MR_MODE_IN : in std_logic; +-- MR_RESTART_IN : in std_logic; +-- -- gk 29.03.10 +-- SLV_ADDR_IN : in std_logic_vector(7 downto 0); +-- SLV_READ_IN : in std_logic; +-- SLV_WRITE_IN : in std_logic; +-- SLV_BUSY_OUT : out std_logic; +-- SLV_ACK_OUT : out std_logic; +-- SLV_DATA_IN : in std_logic_vector(31 downto 0); +-- SLV_DATA_OUT : out std_logic_vector(31 downto 0); +-- -- gk 22.04.10 +-- -- registers setup interface +-- BUS_ADDR_IN : in std_logic_vector(7 downto 0); +-- BUS_DATA_IN : in std_logic_vector(31 downto 0); +-- BUS_DATA_OUT : out std_logic_vector(31 downto 0); -- gk 26.04.10 +-- BUS_WRITE_EN_IN : in std_logic; -- gk 26.04.10 +-- BUS_READ_EN_IN : in std_logic; -- gk 26.04.10 +-- BUS_ACK_OUT : out std_logic; -- gk 26.04.10 +-- -- gk 23.04.10 +-- LED_PACKET_SENT_OUT : out std_logic; +-- LED_AN_DONE_N_OUT : out std_logic; +-- -- CTS interface +-- CTS_NUMBER_IN : in std_logic_vector (15 downto 0); +-- CTS_CODE_IN : in std_logic_vector (7 downto 0); +-- CTS_INFORMATION_IN : in std_logic_vector (7 downto 0); +-- CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0); +-- CTS_START_READOUT_IN : in std_logic; +-- CTS_DATA_OUT : out std_logic_vector (31 downto 0); +-- CTS_DATAREADY_OUT : out std_logic; +-- CTS_READOUT_FINISHED_OUT : out std_logic; +-- CTS_READ_IN : in std_logic; +-- CTS_LENGTH_OUT : out std_logic_vector (15 downto 0); +-- CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0); +-- -- Data payload interface +-- FEE_DATA_IN : in std_logic_vector (15 downto 0); +-- FEE_DATAREADY_IN : in std_logic; +-- FEE_READ_OUT : out std_logic; +-- FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0); +-- FEE_BUSY_IN : in std_logic; +-- --SFP Connection +-- SFP_RXD_P_IN : in std_logic; +-- SFP_RXD_N_IN : in std_logic; +-- SFP_TXD_P_OUT : out std_logic; +-- SFP_TXD_N_OUT : out std_logic; +-- SFP_REFCLK_P_IN : in std_logic; +-- SFP_REFCLK_N_IN : in std_logic; +-- SFP_PRSNT_N_IN : in std_logic; -- SFP Present ('0' = SFP in place, '1' = no SFP mounted) +-- SFP_LOS_IN : in std_logic; -- SFP Loss Of Signal ('0' = OK, '1' = no signal) +-- SFP_TXDIS_OUT : out std_logic; -- SFP disable +-- -- debug ports +-- ANALYZER_DEBUG_OUT : out std_logic_vector(63 downto 0) +-- ); +-- end component; -- 2.43.0