From e2fc7f4e1355c6f79bce92164b83b66e1456a4b7 Mon Sep 17 00:00:00 2001 From: Michael Boehmer Date: Tue, 28 Jun 2022 21:19:05 +0200 Subject: [PATCH] signal cleanup --- gbe/tomcat_gbe.prj | 6 ++- gbe/tomcat_gbe.vhd | 92 +++++++++++----------------------------------- 2 files changed, 26 insertions(+), 72 deletions(-) diff --git a/gbe/tomcat_gbe.prj b/gbe/tomcat_gbe.prj index d40a172..3a5dae0 100644 --- a/gbe/tomcat_gbe.prj +++ b/gbe/tomcat_gbe.prj @@ -264,8 +264,12 @@ add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_ add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_TrbNetData.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_KillPing.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_Forward.vhd" -add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/serdes_gbe.vhd" add_file -verilog -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/serdes_gbe_softlogic.v" +# Choose your SerDes location here +add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/d0ch0/serdes_gbe.vhd" +#add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/d0ch1/serdes_gbe.vhd" +#add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/d1ch0/serdes_gbe.vhd" +#add_file -vhdl -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/d1ch1/serdes_gbe.vhd" #add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_8kx9.vhd" add_file -vhdl -lib work "../../trbnet/gbe_trb/ipcores/ecp5/fifo_4096x9.vhd" diff --git a/gbe/tomcat_gbe.vhd b/gbe/tomcat_gbe.vhd index d0eeb8e..7c2d792 100644 --- a/gbe/tomcat_gbe.vhd +++ b/gbe/tomcat_gbe.vhd @@ -92,56 +92,6 @@ architecture arch of tomcat_gbe is attribute syn_keep of GSR_N : signal is true; attribute syn_preserve of GSR_N : signal is true; - ---------------------------------------------------------------------------- - - signal debug_clock_reset : std_logic_vector(31 downto 0); - signal debug_tools : std_logic_vector(31 downto 0); - - --Media Interface - signal med2int : med2int_array_t(0 to 0); - signal int2med : int2med_array_t(0 to 0); - signal med_stat_debug : std_logic_vector (1*64-1 downto 0); - - signal readout_rx : READOUT_RX; - signal readout_tx : readout_tx_array_t(0 to 0); - - signal ctrlbus_tx, bussci_tx, bustools_tx, bustc_tx, busthresh_tx, bus_master_in : CTRLBUS_TX; - signal ctrlbus_rx, bussci_rx, bustools_rx, bustc_rx, busthresh_rx, bus_master_out : CTRLBUS_RX; - - signal common_stat_reg : std_logic_vector(std_COMSTATREG*32-1 downto 0) := (others => '0'); - signal common_ctrl_reg : std_logic_vector(std_COMCTRLREG*32-1 downto 0); - - signal bus_master_active : std_logic; - - signal timer : TIMERS; - signal led_off : std_logic; - - signal link_stat_in_reg : std_logic; - - - signal link_clock : std_logic; - signal full_reset : std_logic; - signal master_clk_i : std_logic; - signal tx_pll_lol_dual_a : std_logic; - signal tx_clk_avail_i : std_logic; - signal word_sync_i : std_logic; - signal tx_pcs_rst_i : std_logic; - signal link_tx_ready_i : std_logic; - - signal rx_dlm_word : std_logic_vector(7 downto 0); - signal rx_dlm : std_logic; - - signal debug_i : std_logic_vector(31 downto 0); - - signal additional_reg : std_logic_vector(31 downto 0); - - signal flash_ncs_i : std_logic; - signal flash_sclk_i : std_logic; - signal flash_miso_i : std_logic; - signal flash_mosi_i : std_logic; - - signal ep_debug : std_logic_vector(15 downto 0); - signal debug : std_logic_vector(127 downto 0); signal status : std_logic_vector(15 downto 0); @@ -166,7 +116,7 @@ begin REF_CLK_OUT => clk_full, SYS_CLK_OUT => clk_sys, RAW_CLK_OUT => clk_full_osc, - DEBUG_OUT => debug_clock_reset + DEBUG_OUT => open ); ------------------------------------------------------------------------------- @@ -227,35 +177,35 @@ begin RESET => reset_i, GSR_N => GSR_N, -- Trigger - TRIGGER_IN => '0', --cts_rdo_rx.data_valid, + TRIGGER_IN => '0', -- SFP SD_PRSNT_N_IN => SFP_MOD_0, SD_LOS_IN => SFP_LOS, SD_TXDIS_OUT => SFP_TX_DIS, -- trigger channel -- only for LINK_HAS_READOUT - CTS_NUMBER_IN => (others => '0'), --gbe_cts_number, - CTS_CODE_IN => (others => '0'), --gbe_cts_code, - CTS_INFORMATION_IN => (others => '0'), --gbe_cts_information, - CTS_READOUT_TYPE_IN => (others => '0'), --gbe_cts_readout_type, - CTS_START_READOUT_IN => '0', --gbe_cts_start_readout, + CTS_NUMBER_IN => (others => '0'), + CTS_CODE_IN => (others => '0'), + CTS_INFORMATION_IN => (others => '0'), + CTS_READOUT_TYPE_IN => (others => '0'), + CTS_START_READOUT_IN => '0', CTS_DATA_OUT => open, CTS_DATAREADY_OUT => open, - CTS_READOUT_FINISHED_OUT => open, --gbe_cts_readout_finished, + CTS_READOUT_FINISHED_OUT => open, CTS_READ_IN => '1', CTS_LENGTH_OUT => open, - CTS_ERROR_PATTERN_OUT => open, --gbe_cts_status_bits, + CTS_ERROR_PATTERN_OUT => open, -- data channel -- only for LINK_HAS_READOUT - FEE_DATA_IN => (others => '0'), --gbe_fee_data, - FEE_DATAREADY_IN => '0', --gbe_fee_dataready, - FEE_READ_OUT => open, --gbe_fee_read, - FEE_STATUS_BITS_IN => (others => '0'), --gbe_fee_status_bits, - FEE_BUSY_IN => '0', --gbe_fee_busy, + FEE_DATA_IN => (others => '0'), + FEE_DATAREADY_IN => '0', + FEE_READ_OUT => open, + FEE_STATUS_BITS_IN => (others => '0'), + FEE_BUSY_IN => '0', -- unique adresses - MC_UNIQUE_ID_IN => uuid_i, --timer.uid, - MY_TRBNET_ADDRESS_IN => x"c000", --timer.network_address, - ISSUE_REBOOT_OUT => reboot_from_gbe, -- reboot by GbE + MC_UNIQUE_ID_IN => uuid_i, + MY_TRBNET_ADDRESS_IN => x"c000", + ISSUE_REBOOT_OUT => reboot_from_gbe, -- slow control by GbE GSC_CLK_IN => clk_sys, GSC_INIT_DATAREADY_OUT => gsc_init_dataready, @@ -268,10 +218,10 @@ begin GSC_REPLY_READ_OUT => gsc_reply_read, GSC_BUSY_IN => gsc_busy, -- readout - BUS_IP_RX => open, --busgbeip_rx, -- registers inside GbE - BUS_IP_TX => open, --busgbeip_tx, -- registers inside GbE - BUS_REG_RX => open, --busgbereg_rx, -- registers inside GbE - BUS_REG_TX => open, --busgbereg_tx, -- registers inside GbE + BUS_IP_RX => open, -- registers inside GbE + BUS_IP_TX => open, -- registers inside GbE + BUS_REG_RX => open, -- registers inside GbE + BUS_REG_TX => open, -- registers inside GbE -- Forwarder FWD_DST_MAC_IN => (others => '0'), FWD_DST_IP_IN => (others => '0'), -- 2.43.0