From e8f5fe7d87aa34801c9787f23cb5f05346005cb2 Mon Sep 17 00:00:00 2001 From: Michael Boehmer Date: Tue, 7 Dec 2021 14:01:30 +0100 Subject: [PATCH] link establishment works now stable (TM) --- cts/trb3sc_cts.vhd | 37 +++++++++++++++++++++++++++++-------- 1 file changed, 29 insertions(+), 8 deletions(-) diff --git a/cts/trb3sc_cts.vhd b/cts/trb3sc_cts.vhd index 0753b7a..a668447 100644 --- a/cts/trb3sc_cts.vhd +++ b/cts/trb3sc_cts.vhd @@ -240,10 +240,15 @@ architecture trb3sc_arch of trb3sc_cts is signal rst_qd_c_i : std_logic; signal word_sync_i : std_logic; - signal tx_reset_state : std_logic_vector(3 downto 0); + signal tx_reset_state : std_logic_vector(3 downto 0); signal debug_i : std_logic_vector(31 downto 0); + signal master_clk_i : std_logic; + signal dlm_counter : unsigned(15 downto 0); + signal dlm_send_x : std_logic; + signal dlm_send_q : std_logic; + begin THE_TIME_COUNTER_PROC: process( clk_full_osc ) @@ -350,9 +355,9 @@ gen_PCSB : if USE_BACKPLANE = c_NO and USE_ADDON = c_NO generate TX_RST_WORD_IN => x"00", -- sync operation WORD_SYNC_IN => '1', -- CTS MASTER - WORD_SYNC_OUT => open, + WORD_SYNC_OUT => word_sync_i, MASTER_CLK_IN => clk_full_osc, -- CTS MASTER - MASTER_CLK_OUT => open, + MASTER_CLK_OUT => master_clk_i, GLOBAL_RESET_IN => '0', -- check GLOBAL_RESET_OUT => open, TX_PLL_LOL_IN => tx_pll_lol_all_i, @@ -408,19 +413,35 @@ gen_PCSB : if USE_BACKPLANE = c_NO and USE_ADDON = c_NO generate PCSSW <= "01001110"; --SFP2 on B3, AddOn on D1 - THE_SYNC_PROC: process( clk_sys ) + THE_DLM_SEND_PROC: process( master_clk_i ) begin - if( rising_edge(clk_sys) ) then - tx_dlm_i <= cts_output_multiplexers_i(0); + if( rising_edge(master_clk_i) ) then + dlm_send_q <= dlm_send_x; + if( (med2int(0).stat_op(3 downto 0) /= x"0") or (dlm_send_x = '1') ) then + dlm_counter <= (others => '0'); + elsif( word_sync_i = '1' ) then + dlm_counter <= dlm_counter + 1; + end if; end if; - end process THE_SYNC_PROC; + end process THE_DLM_SEND_PROC; + + dlm_send_x <= '1' when (dlm_counter(13) = '1') and (word_sync_i = '1') else '0'; + + tx_dlm_i <= dlm_send_q; + +-- THE_SYNC_PROC: process( clk_sys ) +-- begin +-- if( rising_edge(clk_sys) ) then +-- tx_dlm_i <= cts_output_multiplexers_i(0); +-- end if; +-- end process THE_SYNC_PROC; --HDR_IO(10 downto 1) <= (others => '0'); HDR_IO(10) <= debug_i(15); HDR_IO(9) <= debug_i(14); HDR_IO(8) <= debug_i(13); HDR_IO(7) <= debug_i(12); - HDR_IO(6) <= '0'; + HDR_IO(6) <= word_sync_i; HDR_IO(5) <= '0'; HDR_IO(4) <= '0'; HDR_IO(3) <= '0'; -- 2.43.0