From ee8723ef53613fb645dab6681b3a8fe7c187fd79 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Thu, 24 Oct 2019 13:38:43 +0200 Subject: [PATCH] few updates to block constraints --- releases/tdc_v2.3/Readout_record.vhd | 2 +- releases/tdc_v2.3/unimportant_lines_constraints.lpf | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/releases/tdc_v2.3/Readout_record.vhd b/releases/tdc_v2.3/Readout_record.vhd index c4564a0..7a6cfa4 100644 --- a/releases/tdc_v2.3/Readout_record.vhd +++ b/releases/tdc_v2.3/Readout_record.vhd @@ -241,7 +241,7 @@ begin -- behavioral begin if rising_edge(CLK_100) then TW_pre <= std_logic_vector(unsigned(trg_time)-trg_win_pre); - TW_post <= std_logic_vector(signed('0' & trg_time)+trg_win_post)(38 downto 0); + TW_post <= std_logic_vector(resize(signed('0' & trg_time)+trg_win_post,39)); end if; end process TrigWinCalculation; diff --git a/releases/tdc_v2.3/unimportant_lines_constraints.lpf b/releases/tdc_v2.3/unimportant_lines_constraints.lpf index 1943a1e..b36d381 100644 --- a/releases/tdc_v2.3/unimportant_lines_constraints.lpf +++ b/releases/tdc_v2.3/unimportant_lines_constraints.lpf @@ -22,6 +22,9 @@ MULTICYCLE TO CELL "THE_TDC/TheReadout/TW_pre*" 4 x; MULTICYCLE TO CELL "THE_TDC/TheReadout/TW_post*" 4 x; MULTICYCLE TO CELL "THE_TDC/TheReadout/TW_pr*" 4 x; MULTICYCLE TO CELL "THE_TDC/TheReadout/TW_pos*" 4 x; +MULTICYCLE TO CELL "THE_TDC/TheReadout/un4_tw_pos*" 4 x; +MULTICYCLE TO PORT "THE_TDC/TheReadout/un4_tw_pos*" 4 x; +MULTICYCLE TO ASIC "THE_TDC/TheReadout/un4_tw_post[39:0]" PIN "*" 4 x; MULTICYCLE FROM CELL "THE_TDC/hit_edge[*]" TO CELL "THE_TDC/GEN_Channels.*.Channels/Channel200/memory_ram" 2.000000 X ; -- 2.43.0