From f3aaf53166a323a800ee75d5802afe3d7377f110 Mon Sep 17 00:00:00 2001 From: Thomas Gessler Date: Fri, 12 Feb 2021 16:33:25 +0100 Subject: [PATCH] XCKU MGTs: Add TX PI, BUFSTATUS, optional soft rst The TX phase interpolator (PI) ports can be used to adjust the TX-data phase with respect to the reference (and user) clock to achieve deterministic latency. The FIFO half full flag can be used to detect the phase between user clock and XCLK as with the CERN HTPD TX phase aligner: https://gitlab.cern.ch/HPTD/tx_phase_aligner (cherry picked from commits f9ed402b9d8ec37aa3df5d548f1c719ebbf08a75, 55d4774406b555cf9b1665ac97232877d379e92c, 17dd888de508b1e1b274422b0f6ac3559091c89e, 77e7dbe9d0a711f10f97c67384ea5295c18ef327) --- media_interfaces/med_xcku_sfp_sync.vhd | 129 +++++++++++------- .../gth_xcku_2gbps0_100mhz.xci | 16 +-- .../gth_xcku_2gbps0_100mhz.xml | 18 +-- .../gth_xcku_2gbps0_200mhz.xci | 16 +-- .../gth_xcku_2gbps0_200mhz.xml | 18 +-- .../gth_xcku_2gbps4_120mhz.xci | 16 +-- .../gth_xcku_2gbps4_120mhz.xml | 18 +-- media_interfaces/xcku/gth_xcku_top.vhd | 46 ++++++- 8 files changed, 172 insertions(+), 105 deletions(-) diff --git a/media_interfaces/med_xcku_sfp_sync.vhd b/media_interfaces/med_xcku_sfp_sync.vhd index 5851651..b34808d 100644 --- a/media_interfaces/med_xcku_sfp_sync.vhd +++ b/media_interfaces/med_xcku_sfp_sync.vhd @@ -14,11 +14,13 @@ entity med_xcku_sfp_sync is generic ( IS_SYNC_SLAVE : integer := c_NO; LINE_RATE_KBPS : integer := 2000000; - REFCLK_FREQ_HZ : integer := 100000000 + REFCLK_FREQ_HZ : integer := 100000000; + SOFT_RESET_TX : integer range 0 to 1 := 1 ); port ( SYSCLK : in std_logic; CLK_100 : in std_logic; + RESET_ALL : in std_logic := '0'; GTREFCLK : in std_logic; GTREFCLK_BUFG : in std_logic; RXOUTCLK : out std_logic; @@ -32,6 +34,8 @@ entity med_xcku_sfp_sync is TXUSRCLK_ACTIVE : in std_logic; RXPMARESETDONE : out std_logic; TXPMARESETDONE : out std_logic; + RXRESETDONE : out std_logic; + TXRESETDONE : out std_logic; RESET : in std_logic; CLEAR : in std_logic; @@ -68,7 +72,15 @@ entity med_xcku_sfp_sync is RXRATE : in std_logic_vector(2 downto 0) := b"000"; TXDIFFCTRL : in std_logic_vector(3 downto 0) := b"1100"; TXPOSTCURSOR : in std_logic_vector(4 downto 0) := b"00000"; - TXPRECURSOR : in std_logic_vector(4 downto 0) := b"00000" + TXPRECURSOR : in std_logic_vector(4 downto 0) := b"00000"; + + TXPIPPMEN : in std_logic := '0'; + TXPIPPMOVRDEN : in std_logic := '0'; + TXPIPPMPD : in std_logic := '0'; + TXPIPPMSEL : in std_logic := '0'; + TXPIPPMSTEPSIZE : in std_logic_vector(4 downto 0) := "00000"; + + TXBUFSTATUS : out std_logic_vector(1 downto 0) ); end entity; @@ -82,12 +94,14 @@ architecture med_xcku_sfp_sync_arch of med_xcku_sfp_sync is signal rxnotintable : std_logic; signal rxpmareset : std_logic; - signal reset_all : std_logic; + signal reset_all_i : std_logic; + + signal quad_rst : std_logic; signal rx_cdr_lol : std_logic; signal tx_lol : std_logic; - signal rxresetdone : std_logic; + signal rxresetdone_i : std_logic; signal txpmaresetdone_i : std_logic; signal rx_data_valid_count : unsigned(7 downto 0) := (others => '0'); @@ -128,67 +142,76 @@ begin SD_TXDIS_OUT <= '0'; + reset_all_i <= quad_rst or RESET_ALL when SOFT_RESET_TX = 1 else RESET_ALL; + THE_SERDES : entity work.gth_xcku_top generic map ( LINE_RATE_KBPS => LINE_RATE_KBPS, REFCLK_FREQ_HZ => REFCLK_FREQ_HZ ) port map ( - CLK_100 => CLK_100, - GTREFCLK => GTREFCLK, - RXOUTCLK => RXOUTCLK, - TXOUTCLK => TXOUTCLK, - RXUSRCLK => RXUSRCLK, - RXUSRCLK_DOUBLE => RXUSRCLK_DOUBLE, - TXUSRCLK => TXUSRCLK, - TXUSRCLK_DOUBLE => TXUSRCLK_DOUBLE, - RXUSRCLK_ACTIVE => RXUSRCLK_ACTIVE, - TXUSRCLK_ACTIVE => TXUSRCLK_ACTIVE, - RESET_ALL => reset_all, - RXPMARESET => rxpmareset, - RXPCSRESET => '0', - TXPMARESET => '0', - TXPCSRESET => '0', - INIT_DONE => open, - RXRESETDONE => rxresetdone, - TXRESETDONE => open, - RXPMARESETDONE => RXPMARESETDONE, - TXPMARESETDONE => txpmaresetdone_i, - RXBYTEISALIGNED => open, - RXN => RXN, - RXP => RXP, - TXN => TXN, - TXP => TXP, - TXDATA => txdata, - TXCHARISK => txcharisk, - TXCHARDISPMODE => txchardispmode, - TXCHARDISPVAL => '0', - RXDATA => rxdata, - RXCHARISK => rxcharisk, - RXCHARISCOMMA => open, - RXNOTINTABLE => rxnotintable, - RXDISPERR => open, - DRPADDR => DRPADDR, - DRPCLK => DRPCLK, - DRPDI => DRPDI, - DRPEN => DRPEN, - DRPWE => DRPWE, - DRPDO => DRPDO, - DRPRDY => DRPRDY, - EYESCANRESET => EYESCANRESET, - RXLPMEN => RXLPMEN, - RXRATE => RXRATE, - TXDIFFCTRL => TXDIFFCTRL, - TXPOSTCURSOR => TXPOSTCURSOR, - TXPRECURSOR => TXPRECURSOR + CLK_100 => CLK_100, + GTREFCLK => GTREFCLK, + RXOUTCLK => RXOUTCLK, + TXOUTCLK => TXOUTCLK, + RXUSRCLK => RXUSRCLK, + RXUSRCLK_DOUBLE => RXUSRCLK_DOUBLE, + TXUSRCLK => TXUSRCLK, + TXUSRCLK_DOUBLE => TXUSRCLK_DOUBLE, + RXUSRCLK_ACTIVE => RXUSRCLK_ACTIVE, + TXUSRCLK_ACTIVE => TXUSRCLK_ACTIVE, + RESET_ALL => reset_all_i, + RXPMARESET => rxpmareset, + RXPCSRESET => '0', + TXPMARESET => '0', + TXPCSRESET => '0', + INIT_DONE => open, + RXRESETDONE => rxresetdone_i, + TXRESETDONE => TXRESETDONE, + RXPMARESETDONE => RXPMARESETDONE, + TXPMARESETDONE => txpmaresetdone_i, + RXBYTEISALIGNED => open, + RXN => RXN, + RXP => RXP, + TXN => TXN, + TXP => TXP, + TXDATA => txdata, + TXCHARISK => txcharisk, + TXCHARDISPMODE => txchardispmode, + TXCHARDISPVAL => '0', + RXDATA => rxdata, + RXCHARISK => rxcharisk, + RXCHARISCOMMA => open, + RXNOTINTABLE => rxnotintable, + RXDISPERR => open, + DRPADDR => DRPADDR, + DRPCLK => DRPCLK, + DRPDI => DRPDI, + DRPEN => DRPEN, + DRPWE => DRPWE, + DRPDO => DRPDO, + DRPRDY => DRPRDY, + EYESCANRESET => EYESCANRESET, + RXLPMEN => RXLPMEN, + RXRATE => RXRATE, + TXDIFFCTRL => TXDIFFCTRL, + TXPOSTCURSOR => TXPOSTCURSOR, + TXPRECURSOR => TXPRECURSOR, + TXPIPPMEN => TXPIPPMEN, + TXPIPPMOVRDEN => TXPIPPMOVRDEN, + TXPIPPMPD => TXPIPPMPD, + TXPIPPMSEL => TXPIPPMSEL, + TXPIPPMSTEPSIZE => TXPIPPMSTEPSIZE, + TXBUFSTATUS => TXBUFSTATUS ); + RXRESETDONE <= rxresetdone_i; tx_lol <= not txpmaresetdone_i; process (RXUSRCLK_DOUBLE) is begin if rising_edge(RXUSRCLK_DOUBLE) then - if rxresetdone = '0' then + if rxresetdone_i = '0' then rx_cdr_lol <= '1'; else if rxnotintable = '1' then @@ -226,7 +249,7 @@ begin WA_POSITION => (others => '0'), RX_SERDES_RST => rxpmareset, RX_PCS_RST => open, - QUAD_RST => reset_all, + QUAD_RST => quad_rst, TX_PCS_RST => open, MEDIA_MED2INT => MEDIA_MED2INT, MEDIA_INT2MED => MEDIA_INT2MED, diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci index 6e88795..2985865 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps0_100mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 18 + 21 0 None 8 @@ -1239,7 +1239,7 @@ false true false - false + true false false false @@ -1292,11 +1292,11 @@ false false false - false - false - false - false - false + true + true + true + true + true false false true diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml index acdf8a6..6e15473 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps0_100mhz/gth_xcku_2gbps0_100mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:5d220aeb + 9:1dd46ae3 @@ -10613,7 +10613,7 @@ - false + true @@ -10639,7 +10639,7 @@ - false + true @@ -10665,7 +10665,7 @@ - false + true @@ -10691,7 +10691,7 @@ - false + true @@ -10717,7 +10717,7 @@ - false + true @@ -13737,7 +13737,7 @@ - false + true @@ -16210,7 +16210,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out RX_REFCLK_SOURCE @@ -16323,7 +16323,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 18 + 21 diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci index 62fbd3c..7710d3a 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps0_200mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 20 + 23 0 None 8 @@ -1239,7 +1239,7 @@ false true false - false + true false false false @@ -1292,11 +1292,11 @@ false false false - false - false - false - false - false + true + true + true + true + true false false true diff --git a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml index 82c5206..b615140 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps0_200mhz/gth_xcku_2gbps0_200mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:b87ae0cb + 9:510310c5 @@ -10613,7 +10613,7 @@ - false + true @@ -10639,7 +10639,7 @@ - false + true @@ -10665,7 +10665,7 @@ - false + true @@ -10691,7 +10691,7 @@ - false + true @@ -10717,7 +10717,7 @@ - false + true @@ -13737,7 +13737,7 @@ - false + true @@ -16212,7 +16212,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out RX_REFCLK_SOURCE @@ -16325,7 +16325,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 20 + 23 diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci index f4b2d7c..e4a72e5 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xci @@ -105,7 +105,7 @@ gth_xcku_2gbps4_120mhz 0 0 - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out 100 BOTH 0 @@ -651,7 +651,7 @@ -1 -1 -1 - 24 + 27 0 None 9 @@ -1239,7 +1239,7 @@ false true false - false + true false false false @@ -1292,11 +1292,11 @@ false false false - false - false - false - false - false + true + true + true + true + true false false true diff --git a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml index 3810e34..98bade8 100644 --- a/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml +++ b/media_interfaces/xcku/gth_xcku_2gbps4_120mhz/gth_xcku_2gbps4_120mhz.xml @@ -14,7 +14,7 @@ outputProductCRC - 9:47853102 + 9:7418d113 @@ -10613,7 +10613,7 @@ - false + true @@ -10639,7 +10639,7 @@ - false + true @@ -10665,7 +10665,7 @@ - false + true @@ -10691,7 +10691,7 @@ - false + true @@ -10717,7 +10717,7 @@ - false + true @@ -13737,7 +13737,7 @@ - false + true @@ -16208,7 +16208,7 @@ ENABLE_OPTIONAL_PORTS Enable optional ports Indicate whether a port should be included - rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpmareset_in rxresetdone_out txresetdone_out + rxcdrreset_in rxpcsreset_in rxpmareset_in txpcsreset_in txpippmen_in txpippmovrden_in txpippmpd_in txpippmsel_in txpippmstepsize_in txpmareset_in rxresetdone_out txbufstatus_out txresetdone_out RX_REFCLK_SOURCE @@ -16321,7 +16321,7 @@ INTERNAL_PORT_ENABLEMENT_UPDATED - 24 + 27 diff --git a/media_interfaces/xcku/gth_xcku_top.vhd b/media_interfaces/xcku/gth_xcku_top.vhd index 0c0187d..8b5078f 100644 --- a/media_interfaces/xcku/gth_xcku_top.vhd +++ b/media_interfaces/xcku/gth_xcku_top.vhd @@ -63,7 +63,15 @@ entity gth_xcku_top is RXRATE : in std_logic_vector(2 downto 0); TXDIFFCTRL : in std_logic_vector(3 downto 0); TXPOSTCURSOR : in std_logic_vector(4 downto 0); - TXPRECURSOR : in std_logic_vector(4 downto 0) + TXPRECURSOR : in std_logic_vector(4 downto 0); + + TXPIPPMEN : in std_logic := '0'; + TXPIPPMOVRDEN : in std_logic := '0'; + TXPIPPMPD : in std_logic := '0'; + TXPIPPMSEL : in std_logic := '0'; + TXPIPPMSTEPSIZE : in std_logic_vector(4 downto 0) := "00000"; + + TXBUFSTATUS : out std_logic_vector(1 downto 0) ); end entity gth_xcku_top; @@ -110,6 +118,11 @@ architecture behavioral of gth_xcku_top is txctrl2_in : in std_logic_vector(7 downto 0); txdiffctrl_in : in std_logic_vector(3 downto 0); txpcsreset_in : in std_logic_vector(0 downto 0); + txpippmen_in : in std_logic_vector(0 downto 0); + txpippmovrden_in : in std_logic_vector(0 downto 0); + txpippmpd_in : in std_logic_vector(0 downto 0); + txpippmsel_in : in std_logic_vector(0 downto 0); + txpippmstepsize_in : in std_logic_vector(4 downto 0); txpmareset_in : in std_logic_vector(0 downto 0); txpostcursor_in : in std_logic_vector(4 downto 0); txprecursor_in : in std_logic_vector(4 downto 0); @@ -132,6 +145,7 @@ architecture behavioral of gth_xcku_top is rxoutclk_out : out std_logic_vector(0 downto 0); rxpmaresetdone_out : out std_logic_vector(0 downto 0); rxresetdone_out : out std_logic_vector(0 downto 0); + txbufstatus_out : out std_logic_vector(1 downto 0); txoutclk_out : out std_logic_vector(0 downto 0); txpmaresetdone_out : out std_logic_vector(0 downto 0); txresetdone_out : out std_logic_vector(0 downto 0) @@ -180,6 +194,11 @@ architecture behavioral of gth_xcku_top is txctrl2_in : in std_logic_vector(7 downto 0); txdiffctrl_in : in std_logic_vector(3 downto 0); txpcsreset_in : in std_logic_vector(0 downto 0); + txpippmen_in : in std_logic_vector(0 downto 0); + txpippmovrden_in : in std_logic_vector(0 downto 0); + txpippmpd_in : in std_logic_vector(0 downto 0); + txpippmsel_in : in std_logic_vector(0 downto 0); + txpippmstepsize_in : in std_logic_vector(4 downto 0); txpmareset_in : in std_logic_vector(0 downto 0); txpostcursor_in : in std_logic_vector(4 downto 0); txprecursor_in : in std_logic_vector(4 downto 0); @@ -202,6 +221,7 @@ architecture behavioral of gth_xcku_top is rxoutclk_out : out std_logic_vector(0 downto 0); rxpmaresetdone_out : out std_logic_vector(0 downto 0); rxresetdone_out : out std_logic_vector(0 downto 0); + txbufstatus_out : out std_logic_vector(1 downto 0); txoutclk_out : out std_logic_vector(0 downto 0); txpmaresetdone_out : out std_logic_vector(0 downto 0); txresetdone_out : out std_logic_vector(0 downto 0) @@ -250,6 +270,11 @@ architecture behavioral of gth_xcku_top is txctrl2_in : in std_logic_vector(7 downto 0); txdiffctrl_in : in std_logic_vector(3 downto 0); txpcsreset_in : in std_logic_vector(0 downto 0); + txpippmen_in : in std_logic_vector(0 downto 0); + txpippmovrden_in : in std_logic_vector(0 downto 0); + txpippmpd_in : in std_logic_vector(0 downto 0); + txpippmsel_in : in std_logic_vector(0 downto 0); + txpippmstepsize_in : in std_logic_vector(4 downto 0); txpmareset_in : in std_logic_vector(0 downto 0); txpostcursor_in : in std_logic_vector(4 downto 0); txprecursor_in : in std_logic_vector(4 downto 0); @@ -272,6 +297,7 @@ architecture behavioral of gth_xcku_top is rxoutclk_out : out std_logic_vector(0 downto 0); rxpmaresetdone_out : out std_logic_vector(0 downto 0); rxresetdone_out : out std_logic_vector(0 downto 0); + txbufstatus_out : out std_logic_vector(1 downto 0); txoutclk_out : out std_logic_vector(0 downto 0); txpmaresetdone_out : out std_logic_vector(0 downto 0); txresetdone_out : out std_logic_vector(0 downto 0) @@ -435,6 +461,11 @@ begin txctrl2_in => txctrl2, txdiffctrl_in => TXDIFFCTRL, txpcsreset_in(0) => TXPCSRESET, + txpippmen_in(0) => TXPIPPMEN, + txpippmovrden_in(0) => TXPIPPMOVRDEN, + txpippmpd_in(0) => TXPIPPMPD, + txpippmsel_in(0) => TXPIPPMSEL, + txpippmstepsize_in => TXPIPPMSTEPSIZE, txpmareset_in(0) => TXPMARESET, txpostcursor_in => TXPOSTCURSOR, txprecursor_in => TXPRECURSOR, @@ -457,6 +488,7 @@ begin rxoutclk_out(0) => RXOUTCLK, rxpmaresetdone_out(0) => RXPMARESETDONE, rxresetdone_out(0) => RXRESETDONE, + txbufstatus_out => TXBUFSTATUS, txoutclk_out(0) => TXOUTCLK, txpmaresetdone_out(0) => TXPMARESETDONE, txresetdone_out(0) => TXRESETDONE @@ -508,6 +540,11 @@ begin txctrl2_in => txctrl2, txdiffctrl_in => TXDIFFCTRL, txpcsreset_in(0) => TXPCSRESET, + txpippmen_in(0) => TXPIPPMEN, + txpippmovrden_in(0) => TXPIPPMOVRDEN, + txpippmpd_in(0) => TXPIPPMPD, + txpippmsel_in(0) => TXPIPPMSEL, + txpippmstepsize_in => TXPIPPMSTEPSIZE, txpmareset_in(0) => TXPMARESET, txpostcursor_in => TXPOSTCURSOR, txprecursor_in => TXPRECURSOR, @@ -530,6 +567,7 @@ begin rxoutclk_out(0) => RXOUTCLK, rxpmaresetdone_out(0) => RXPMARESETDONE, rxresetdone_out(0) => RXRESETDONE, + txbufstatus_out => TXBUFSTATUS, txoutclk_out(0) => TXOUTCLK, txpmaresetdone_out(0) => TXPMARESETDONE, txresetdone_out(0) => TXRESETDONE @@ -581,6 +619,11 @@ begin txctrl2_in => txctrl2, txdiffctrl_in => TXDIFFCTRL, txpcsreset_in(0) => TXPCSRESET, + txpippmen_in(0) => TXPIPPMEN, + txpippmovrden_in(0) => TXPIPPMOVRDEN, + txpippmpd_in(0) => TXPIPPMPD, + txpippmsel_in(0) => TXPIPPMSEL, + txpippmstepsize_in => TXPIPPMSTEPSIZE, txpmareset_in(0) => TXPMARESET, txpostcursor_in => TXPOSTCURSOR, txprecursor_in => TXPRECURSOR, @@ -603,6 +646,7 @@ begin rxoutclk_out(0) => RXOUTCLK, rxpmaresetdone_out(0) => RXPMARESETDONE, rxresetdone_out(0) => RXRESETDONE, + txbufstatus_out => TXBUFSTATUS, txoutclk_out(0) => TXOUTCLK, txpmaresetdone_out(0) => TXPMARESETDONE, txresetdone_out(0) => TXRESETDONE -- 2.43.0