From fd6f7f8a0e00c06acad5e7e55b429b0562eaa789 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Fri, 14 May 2021 17:38:56 +0200 Subject: [PATCH] update Mimosis for HDMI addon --- mimosis/config_compile_frankfurt.pl | 6 +- mimosis/trb5sc_mimosis.vhd | 33 ++-- pinout/trb5sc_hdmi.lpf | 288 ++++++++++++++++++++++++++++ 3 files changed, 313 insertions(+), 14 deletions(-) create mode 100644 pinout/trb5sc_hdmi.lpf diff --git a/mimosis/config_compile_frankfurt.pl b/mimosis/config_compile_frankfurt.pl index 3bef155..62708aa 100644 --- a/mimosis/config_compile_frankfurt.pl +++ b/mimosis/config_compile_frankfurt.pl @@ -7,11 +7,11 @@ Speedgrade => '8', TOPNAME => "trb5sc_mimosis", lm_license_file_for_synplify => "27020\@jspc29", #"27000\@lxcad01.gsi.de"; lm_license_file_for_par => "1702\@jspc29", -lattice_path => '/d/jspc29/lattice/diamond/3.10_x64', -synplify_path => '/d/jspc29/lattice/synplify/O-2018.09-SP1/', +lattice_path => '/d/jspc29/lattice/diamond/3.11_x64', +synplify_path => '/d/jspc29/lattice/synplify/P-2019.09-SP1/', nodelist_file => '../nodelist_frankfurt.txt', -pinout_file => 'trb5sc_tdc', +pinout_file => 'trb5sc_hdmi', par_options => '../par.p2t', diff --git a/mimosis/trb5sc_mimosis.vhd b/mimosis/trb5sc_mimosis.vhd index 66da8c7..6ff4b8c 100644 --- a/mimosis/trb5sc_mimosis.vhd +++ b/mimosis/trb5sc_mimosis.vhd @@ -31,8 +31,23 @@ entity trb5sc_mimosis is -- FE_GPIO : inout std_logic_vector(11 downto 0); -- FE_CLK : out std_logic_vector( 2 downto 1); -- FE_DIFF : inout std_logic_vector(63 downto 0); - INP : inout std_logic_vector(63 downto 0); - MOSI : in std_logic; + --INP : inout std_logic_vector(63 downto 0); + LED_ADDON : out std_logic_vector(5 downto 0); + LED_ADDON_SFP_ORANGE : out std_logic_vector(1 downto 0); + LED_ADDON_SFP_GREEN : out std_logic_vector(1 downto 0); + SFP_ADDON_TX_DIS : out std_logic_vector(1 downto 0); + SFP_ADDON_LOS : in std_logic_vector(1 downto 0); + + RJ : inout std_logic_vector(3 downto 0); + H1 : inout std_logic_vector(4 downto 0); + H2 : inout std_logic_vector(4 downto 0); + H3 : inout std_logic_vector(4 downto 0); + H4 : inout std_logic_vector(4 downto 0); + H5 : inout std_logic_vector(4 downto 0); + H6 : inout std_logic_vector(4 downto 0); + H7 : inout std_logic_vector(4 downto 0); + + PIN : inout std_logic_vector(8 downto 1); --ADC ADC_SCLK : out std_logic; @@ -432,15 +447,11 @@ THE_160_PLL : entity work.pll_200_160 HDR_IO <= data_i; - inp_i <= INP(14) & INP(12) & INP(10) & INP(8) & INP(6) & INP(4) & INP(2) & INP(0); - INP(30) <= out_i(7); - INP(28) <= out_i(6); - INP(26) <= out_i(5); - INP(24) <= out_i(4); - INP(22) <= out_i(3); - INP(20) <= out_i(2); - INP(18) <= out_i(1); - INP(16) <= out_i(0); + + H3(3 downto 0) <= out_i(3 downto 0); + H4(3 downto 0) <= out_i(7 downto 4); + + inp_i <= H2(3 downto 0) & H1(3 downto 0); -- s_move <= add_reg(7 downto 0); diff --git a/pinout/trb5sc_hdmi.lpf b/pinout/trb5sc_hdmi.lpf new file mode 100644 index 0000000..eb2dc2e --- /dev/null +++ b/pinout/trb5sc_hdmi.lpf @@ -0,0 +1,288 @@ +COMMERCIAL ; +BLOCK RESETPATHS ; +BLOCK ASYNCPATHS ; +SYSCONFIG MCCLK_FREQ=38.8 CONFIG_IOVOLTAGE=3.3 ;#BACKGROUND_RECONFIG=ON + +BANK 0 VCCIO 2.5 V; +BANK 1 VCCIO 2.5 V; +BANK 2 VCCIO 2.5 V; +BANK 3 VCCIO 2.5 V; +BANK 4 VCCIO 3.3 V; +BANK 6 VCCIO 2.5 V; +BANK 7 VCCIO 2.5 V; +BANK 8 VCCIO 3.3 V; + +################################################################# +# Clock I/O +################################################################# +LOCATE COMP "CLK_125" SITE "AD1" ;#was "OSC_CORE_125" +LOCATE COMP "CLK_200" SITE "AD32" ;#was "OSC_CORE_200" +LOCATE COMP "CLK_EXT" SITE "C28" ;#was "EXT_CLOCK" +DEFINE PORT GROUP "CLK_group" "CLK*" ; +IOBUF GROUP "CLK_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; + +################################################################# +# Trigger I/O +################################################################# +LOCATE COMP "TRIG_IN_BACKPL" SITE "AD3" ; +LOCATE COMP "TRIG_IN_RJ45" SITE "AC2" ; +DEFINE PORT GROUP "TRIG_IN_group" "TRIG_IN*" ; +IOBUF GROUP "TRIG_IN_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; + +LOCATE COMP "SPARE[0]" SITE "AC3" ; +LOCATE COMP "SPARE[1]" SITE "AB1" ; +DEFINE PORT GROUP "SPARE_group" "SPARE*" ; +IOBUF GROUP "SPARE_group" IO_TYPE=LVDS ; + +################################################################# +# SFP +################################################################# +LOCATE COMP "SFP_TX_DIS" SITE "AH28" ; +LOCATE COMP "SFP_LOS" SITE "AK29" ; +LOCATE COMP "SFP_MOD_0" SITE "AG28" ; +IOBUF PORT "SFP_TX_DIS" IO_TYPE=LVTTL33 PULLMODE=NONE ; +IOBUF PORT "SFP_LOS" IO_TYPE=LVTTL33 PULLMODE=NONE ; +IOBUF PORT "SFP_MOD_0" IO_TYPE=LVTTL33 PULLMODE=NONE ; + +################################################################# +# Frontend +################################################################# +LOCATE COMP "LED_ADDON[0]" SITE "A18" ; #was FE_GPIO[0] #RJ 0 +LOCATE COMP "LED_ADDON[1]" SITE "C18" ; #was FE_GPIO[1] #RJ 1 +LOCATE COMP "LED_ADDON[2]" SITE "D18" ; #was FE_GPIO[2] #SFP1 green +LOCATE COMP "LED_ADDON[3]" SITE "F18" ; #was FE_GPIO[3] #SFP1 orange +LOCATE COMP "LED_ADDON[4]" SITE "A19" ; #was FE_GPIO[4] #SFP2 green +# LOCATE COMP "" SITE "B19" ; #was FE_GPIO[5] +LOCATE COMP "LED_ADDON[5]" SITE "C19" ; #was FE_GPIO[6] #SFP2 orange +# LOCATE COMP "" SITE "D19" ; #was FE_GPIO[7] +LOCATE COMP "SFP_ADDON_TX_DIS[0]" SITE "E19" ; #was FE_GPIO[8] +LOCATE COMP "SFP_ADDON_LOS[1]" SITE "F19" ; #was FE_GPIO[9] +LOCATE COMP "SFP_ADDON_LOS[0]" SITE "A20" ; #was FE_GPIO[10] +LOCATE COMP "SFP_ADDON_TX_DIS[1]" SITE "C20" ; #was FE_GPIO[11] + +DEFINE PORT GROUP "LED_ADDON_group" "LED_ADDON*" ; +IOBUF GROUP "LED_ADDON_group" IO_TYPE=LVCMOS25 PULLMODE=UP ; +DEFINE PORT GROUP "SFP_ADDON_group" "SFP_ADDON*" ; +IOBUF GROUP "SFP_ADDON_group" IO_TYPE=LVCMOS25 PULLMODE=UP ; + +LOCATE COMP "RJ[0]" SITE "C5" ; +LOCATE COMP "RJ[3]" SITE "P5" ; +# DEFINE PORT GROUP "FE_CLK_group" "FE_CLK*" ; +# IOBUF GROUP "FE_CLK_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; + +LOCATE COMP "H5[0]" SITE "R29" ; #was "FE_DIFF[0]" +LOCATE COMP "H7[0]" SITE "T29" ; #was "FE_DIFF[1]" +LOCATE COMP "H5[1]" SITE "P31" ; #was "FE_DIFF[2]" +LOCATE COMP "H7[1]" SITE "R30" ; #was "FE_DIFF[3]" +LOCATE COMP "H5[2]" SITE "N32" ; #was "FE_DIFF[4]" +LOCATE COMP "H7[2]" SITE "U31" ; #was "FE_DIFF[5]" +LOCATE COMP "H5[3]" SITE "R32" ; #was "FE_DIFF[6]" +LOCATE COMP "H7[3]" SITE "W30" ; #was "FE_DIFF[7]" +LOCATE COMP "H5[4]" SITE "T32" ; #was "FE_DIFF[8]" +# LOCATE COMP "FE_DIFF[9]" SITE "V32" ; #was "FE_DIFF[9]" +LOCATE COMP "H7[4]" SITE "Y26" ; #was "FE_DIFF[10]" +# LOCATE COMP "FE_DIFF[11]" SITE "Y28" ; #was "FE_DIFF[11]" +LOCATE COMP "H1[4]" SITE "Y29" ; #was "FE_DIFF[12]" +# LOCATE COMP "FE_DIFF[13]" SITE "AB26" ; #was "FE_DIFF[13]" +LOCATE COMP "H1[3]" SITE "AB28" ; #was "FE_DIFF[14]" +# LOCATE COMP "FE_DIFF[15]" SITE "AC26" ; #was "FE_DIFF[15]" +LOCATE COMP "H1[2]" SITE "D29" ; #was "FE_DIFF[16]" +LOCATE COMP "H6[0]" SITE "F29" ; #was "FE_DIFF[17]" +LOCATE COMP "H1[1]" SITE "B32" ; #was "FE_DIFF[18]" +LOCATE COMP "H6[1]" SITE "D30" ; #was "FE_DIFF[19]" +LOCATE COMP "H1[0]" SITE "F30" ; #was "FE_DIFF[20]" +LOCATE COMP "H6[2]" SITE "C32" ; #was "FE_DIFF[21]" +LOCATE COMP "H2[4]" SITE "F31" ; #was "FE_DIFF[22]" +LOCATE COMP "H6[3]" SITE "F32" ; #was "FE_DIFF[23]" +LOCATE COMP "H2[3]" SITE "H31" ; #was "FE_DIFF[24]" +LOCATE COMP "H6[4]" SITE "J30" ; #was "FE_DIFF[25]" +LOCATE COMP "H2[2]" SITE "K31" ; #was "FE_DIFF[26]" +# LOCATE COMP "FE_DIFF[27]" SITE "K32" ; #was "FE_DIFF[27]" +LOCATE COMP "H2[1]" SITE "L31" ; #was "FE_DIFF[28]" +# LOCATE COMP "FE_DIFF[29]" SITE "J29" ; #was "FE_DIFF[29]" +LOCATE COMP "H2[0]" SITE "H27" ; #was "FE_DIFF[30]" +# LOCATE COMP "FE_DIFF[31]" SITE "K27" ; #was "FE_DIFF[31]" +LOCATE COMP "H3[4]" SITE "D4" ; #was "FE_DIFF[32]" +LOCATE COMP "H3[3]" SITE "B1" ; #was "FE_DIFF[34]" +LOCATE COMP "H3[2]" SITE "F3" ; #was "FE_DIFF[36]" +LOCATE COMP "H3[1]" SITE "F2" ; #was "FE_DIFF[38]" +LOCATE COMP "H3[0]" SITE "H2" ; #was "FE_DIFF[40]" +# LOCATE COMP "FE_DIFF[41]" SITE "J3" ; #was "FE_DIFF[41]" +LOCATE COMP "H4[3]" SITE "K2" ; #was "FE_DIFF[42]" +# LOCATE COMP "FE_DIFF[43]" SITE "K1" ; #was "FE_DIFF[43]" +LOCATE COMP "H4[4]" SITE "L2" ; #was "FE_DIFF[44]" +# LOCATE COMP "FE_DIFF[45]" SITE "J4" ; #was "FE_DIFF[45]" +LOCATE COMP "H4[2]" SITE "H6" ; #was "FE_DIFF[46]" +# LOCATE COMP "FE_DIFF[47]" SITE "K6" ; #was "FE_DIFF[47]" +LOCATE COMP "H4[1]" SITE "R4" ; #was "FE_DIFF[48]" +# LOCATE COMP "FE_DIFF[49]" SITE "T4" ; #was "FE_DIFF[49]" +LOCATE COMP "H4[0]" SITE "P2" ; #was "FE_DIFF[50]" +# LOCATE COMP "FE_DIFF[51]" SITE "R3" ; #was "FE_DIFF[51]" +LOCATE COMP "RJ[1]" SITE "N1" ; #was "FE_DIFF[52]" +# LOCATE COMP "FE_DIFF[53]" SITE "U2" ; #was "FE_DIFF[53]" +# LOCATE COMP "FE_DIFF[54]" SITE "R1" ; #was "FE_DIFF[54]" +# LOCATE COMP "FE_DIFF[55]" SITE "W3" ; #was "FE_DIFF[55]" +LOCATE COMP "RJ[2]" SITE "T1" ; #was "FE_DIFF[56]" +# LOCATE COMP "FE_DIFF[57]" SITE "V1" ; #was "FE_DIFF[57]" +# LOCATE COMP "FE_DIFF[58]" SITE "Y7" ; #was "FE_DIFF[58]" +# LOCATE COMP "FE_DIFF[59]" SITE "Y5" ; #was "FE_DIFF[59]" +# LOCATE COMP "FE_DIFF[60]" SITE "Y4" ; #was "FE_DIFF[60]" +# LOCATE COMP "FE_DIFF[61]" SITE "AB7" ; #was "FE_DIFF[61]" +# LOCATE COMP "FE_DIFF[62]" SITE "AB5" ; #was "FE_DIFF[62]" +# LOCATE COMP "FE_DIFF[63]" SITE "AC7" ; #was "FE_DIFF[63]" +DEFINE PORT GROUP "H1_group" "H1*" ; +IOBUF GROUP "H1_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; +DEFINE PORT GROUP "H2_group" "H2*" ; +IOBUF GROUP "H2_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; +DEFINE PORT GROUP "H3_group" "H3*" ; +IOBUF GROUP "H3_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; +DEFINE PORT GROUP "H4_group" "H4*" ; +IOBUF GROUP "H4_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; +DEFINE PORT GROUP "H5_group" "H5*" ; +IOBUF GROUP "H5_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; +DEFINE PORT GROUP "H6_group" "H6*" ; +IOBUF GROUP "H6_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; +DEFINE PORT GROUP "H7_group" "H7*" ; +IOBUF GROUP "H7_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; +DEFINE PORT GROUP "RJ_group" "RJ*" ; +IOBUF GROUP "RJ_group" IO_TYPE=LVDS DIFFRESISTOR=100 ; + + +LOCATE COMP "PIN[1]" SITE "F4" ; #was "FE_DIFF[33]" +LOCATE COMP "PIN[2]" SITE "C1" ; #was "FE_DIFF[37]" +LOCATE COMP "PIN[3]" SITE "F5" ; #was FE_DIFF_33_N +LOCATE COMP "PIN[4]" SITE "D1" ; #was FE_DIFF_37_N +LOCATE COMP "PIN[5]" SITE "D3" ; #was "FE_DIFF[35]" +LOCATE COMP "PIN[6]" SITE "F1" ; #was "FE_DIFF[39]" +LOCATE COMP "PIN[7]" SITE "D2" ; #was FE_DIFF_35_N +LOCATE COMP "PIN[8]" SITE "H1" ; #was FE_DIFF_39_N +DEFINE PORT GROUP "PIN_group" "PIN*" ; +IOBUF GROUP "PIN_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ; + + +################################################################# +# Temperature, Flash & ID +################################################################# +LOCATE COMP "I2C_SDA" SITE "A11"; +LOCATE COMP "I2C_SCL" SITE "B11"; +LOCATE COMP "TMP_ALERT" SITE "C11"; +IOBUF PORT "I2C_SDA" IO_TYPE=LVCMOS25 ; +IOBUF PORT "I2C_SCL" IO_TYPE=LVCMOS25 ; +IOBUF PORT "TMP_ALERT" IO_TYPE=LVCMOS25 ; + + +LOCATE COMP "PROGRAMN" SITE "AH1"; +IOBUF PORT "PROGRAMN" IO_TYPE=LVTTL33 PULLMODE=UP DRIVE=8 ; + + +LOCATE COMP "IN_SELECT_EXT_CLOCK" SITE "A16"; +IOBUF PORT "IN_SELECT_EXT_CLOCK" IO_TYPE=LVCMOS25 ; + + +LOCATE COMP "FLASH_HOLD" SITE "AL1"; +LOCATE COMP "FLASH_MISO" SITE "AJ2"; +LOCATE COMP "FLASH_MOSI" SITE "AK2"; +LOCATE COMP "FLASH_NCS" SITE "AJ3"; +LOCATE COMP "FLASH_SCLK" SITE "AJ1"; +LOCATE COMP "FLASH_WP" SITE "AM2"; +DEFINE PORT GROUP "FLASH_group" "FLASH*" ; +IOBUF GROUP "FLASH_group" IO_TYPE=LVTTL33 PULLMODE=NONE; + + +LOCATE COMP "ADC_MISO" SITE "AK3"; +LOCATE COMP "ADC_MOSI" SITE "AL3"; +LOCATE COMP "ADC_NCS" SITE "AH3"; +LOCATE COMP "ADC_SCLK" SITE "AG3"; +IOBUF PORT "ADC_SCLK" IO_TYPE=LVTTL33 PULLMODE=UP DRIVE=4 ; +IOBUF PORT "ADC_NCS" IO_TYPE=LVTTL33 PULLMODE=UP DRIVE=4 ; +IOBUF PORT "ADC_MOSI" IO_TYPE=LVTTL33 PULLMODE=UP DRIVE=4 ; +IOBUF PORT "ADC_MISO" IO_TYPE=LVTTL33 PULLMODE=UP ; + + +################################################################# +# LED +################################################################# +LOCATE COMP "LED_SFP_YELLOW" SITE "AG32"; +LOCATE COMP "LED_SFP_GREEN" SITE "AK30"; +LOCATE COMP "LED_SFP_RED" SITE "AH32"; +DEFINE PORT GROUP "LED_SFP_group" "LED_SFP*" ; +IOBUF GROUP "LED_SFP_group" IO_TYPE=LVTTL33 ; + +LOCATE COMP "LED_1" SITE "A26"; +LOCATE COMP "LED_2" SITE "B26"; +LOCATE COMP "LED_3" SITE "A28"; +LOCATE COMP "LED_4" SITE "A29"; +LOCATE COMP "LED_5" SITE "A30"; +LOCATE COMP "LED_6" SITE "A31"; +LOCATE COMP "LED_7" SITE "B29"; +LOCATE COMP "LED_8" SITE "B30"; +IOBUF PORT "LED_1" IO_TYPE=LVCMOS25 ; +IOBUF PORT "LED_2" IO_TYPE=LVCMOS25 ; +IOBUF PORT "LED_3" IO_TYPE=LVCMOS25 ; +IOBUF PORT "LED_4" IO_TYPE=LVCMOS25 ; +IOBUF PORT "LED_5" IO_TYPE=LVCMOS25 ; +IOBUF PORT "LED_6" IO_TYPE=LVCMOS25 ; +IOBUF PORT "LED_7" IO_TYPE=LVCMOS25 ; +IOBUF PORT "LED_8" IO_TYPE=LVCMOS25 ; + + +LOCATE COMP "LED_RJ_GREEN_0" SITE "AK32"; +LOCATE COMP "LED_RJ_RED_0" SITE "AJ32"; +LOCATE COMP "LED_EXT_CLOCK" SITE "AJ30"; +LOCATE COMP "LED_RJ_GREEN_1" SITE "AM30"; +LOCATE COMP "LED_RJ_RED_1" SITE "AL30"; +IOBUF PORT "LED_RJ_GREEN_0" IO_TYPE=LVTTL33 ; +IOBUF PORT "LED_RJ_RED_0" IO_TYPE=LVTTL33 ; +IOBUF PORT "LED_EXT_CLOCK" IO_TYPE=LVTTL33 ; +IOBUF PORT "LED_RJ_GREEN_1" IO_TYPE=LVTTL33 ; +IOBUF PORT "LED_RJ_RED_1" IO_TYPE=LVTTL33 ; + + + +################################################################# +# Test & Other IO +################################################################# +LOCATE COMP "TEST_1" SITE "A7"; +LOCATE COMP "TEST_2" SITE "A5"; +LOCATE COMP "TEST_3" SITE "A4"; +LOCATE COMP "TEST_4" SITE "A3"; +LOCATE COMP "TEST_5" SITE "A2"; +LOCATE COMP "TEST_6" SITE "B3"; +LOCATE COMP "TEST_7" SITE "B4"; +LOCATE COMP "TEST_8" SITE "B7"; +LOCATE COMP "TEST_9" SITE "C7"; +LOCATE COMP "TEST_10" SITE "C8"; +LOCATE COMP "TEST_11" SITE "D7"; +LOCATE COMP "TEST_12" SITE "D8"; +LOCATE COMP "TEST_13" SITE "E8"; +LOCATE COMP "TEST_14" SITE "F8"; +DEFINE PORT GROUP "TEST_group" "TEST*" ; +IOBUF GROUP "TEST_group" IO_TYPE=LVCMOS25 DRIVE=8; + + +LOCATE COMP "HDR_IO_0" SITE "A23"; +LOCATE COMP "HDR_IO_1" SITE "A22"; +LOCATE COMP "HDR_IO_2" SITE "B22"; +LOCATE COMP "HDR_IO_3" SITE "A24"; +LOCATE COMP "HDR_IO_4" SITE "C23"; +LOCATE COMP "HDR_IO_5" SITE "B23"; +LOCATE COMP "HDR_IO_6" SITE "C22"; +LOCATE COMP "HDR_IO_7" SITE "C24"; +LOCATE COMP "HDR_IO_8" SITE "D23"; +LOCATE COMP "HDR_IO_9" SITE "D24"; +LOCATE COMP "HDR_IO_10" SITE "E23"; +LOCATE COMP "HDR_IO_11" SITE "D22"; +LOCATE COMP "HDR_IO_12" SITE "F23"; +LOCATE COMP "HDR_IO_13" SITE "E22"; +LOCATE COMP "HDR_IO_14" SITE "F20"; +LOCATE COMP "HDR_IO_15" SITE "F22"; +DEFINE PORT GROUP "HDR_group" "HDR*" ; +IOBUF GROUP "HDR_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN ; + + +LOCATE COMP "BACK_GPIO_0" SITE "P28"; +LOCATE COMP "BACK_GPIO_1" SITE "P29"; +LOCATE COMP "BACK_GPIO_2" SITE "R27"; +LOCATE COMP "BACK_GPIO_3" SITE "T27"; +DEFINE PORT GROUP "BACK_GPIO_group" "BACK_GPIO*" ; +IOBUF GROUP "BACK_GPIO_group" IO_TYPE=LVCMOS25 PULLMODE=UP; -- 2.43.0