From ff3f61facc37aba23ae8269cf10083c91df2869e Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Wed, 31 Oct 2018 11:56:30 +0100 Subject: [PATCH] update backplane master design --- backplanemaster/config.vhd | 2 +- backplanemaster/config_compile_frankfurt.pl | 2 + backplanemaster/par.p2t | 2 +- backplanemaster/trb3sc_master.lpf | 62 ++++++++++----------- backplanemaster/trb3sc_master.vhd | 2 +- 5 files changed, 36 insertions(+), 34 deletions(-) diff --git a/backplanemaster/config.vhd b/backplanemaster/config.vhd index 9c1ca7e..e47911b 100644 --- a/backplanemaster/config.vhd +++ b/backplanemaster/config.vhd @@ -37,7 +37,7 @@ package config is constant TRIG_GEN_OUTPUT_NUM : integer := 4; constant MONITOR_INPUT_NUM : integer := 22; - constant INCLUDE_GBE : integer := c_NO; + constant INCLUDE_GBE : integer := c_YES; ------------------------------------------------------------------------------ diff --git a/backplanemaster/config_compile_frankfurt.pl b/backplanemaster/config_compile_frankfurt.pl index 410d0c3..1cc1231 100644 --- a/backplanemaster/config_compile_frankfurt.pl +++ b/backplanemaster/config_compile_frankfurt.pl @@ -3,6 +3,8 @@ lm_license_file_for_synplify => "27020\@jspc29", #"27000\@lxcad01.gsi.de"; lm_license_file_for_par => "1702\@hadeb05.gsi.de", lattice_path => '/d/jspc29/lattice/diamond/3.9_x64/', synplify_path => '/d/jspc29/lattice/synplify/L-2016.09-1/', +#lattice_path => '/d/jspc29/lattice/diamond/3.10_x64/', +#synplify_path => '/d/jspc29/lattice/synplify/N-2017.09-1/', # synplify_command => "/d/jspc29/lattice/diamond/3.6_x64/bin/lin64/synpwrap -fg -options", #synplify_command => "/d/jspc29/lattice/synplify/J-2014.09-SP2/bin/synplify_premier_dp", diff --git a/backplanemaster/par.p2t b/backplanemaster/par.p2t index 7610522..b1ea293 100644 --- a/backplanemaster/par.p2t +++ b/backplanemaster/par.p2t @@ -3,7 +3,7 @@ -l 5 -y -s 12 --t 16 +-t 32 -c 1 -e 2 #-g guidefile.ncd diff --git a/backplanemaster/trb3sc_master.lpf b/backplanemaster/trb3sc_master.lpf index 65605d2..bc891a1 100644 --- a/backplanemaster/trb3sc_master.lpf +++ b/backplanemaster/trb3sc_master.lpf @@ -10,7 +10,7 @@ LOCATE COMP "gen_PCSD.THE_MEDIA_PCSD/gen_pcs0.THE_SERDES/PCSD_INST" SIT LOCATE COMP "gen_GBE.GBE/physical_impl_gen.physical/impl_gen.gbe_serdes/PCSD_INST" SITE "PCSD"; REGION "MEDIA_A" "R75C100D" 45 46; -REGION "MEDIA_B" "R75C50D" 45 46; +REGION "MEDIA_B" "R85C45D" 35 56; REGION "MEDIA_C" "R75C135D" 45 46; REGION "MEDIA_D" "R75C19D" 40 36; @@ -21,9 +21,9 @@ LOCATE UGROUP "gen_PCSD.THE_MEDIA_PCSD/media_interface_group" REGION "MED -MULTICYCLE TO CELL "THE_MEDIA_4_DOW*/sci*" 20 ns; -MULTICYCLE FROM CELL "THE_MEDIA_4_DOW*/sci*" 20 ns; -MULTICYCLE TO CELL "THE_MEDIA_4_DOW*/PROC_SCI_CTRL.wa*" 20 ns; +#MULTICYCLE TO CELL "THE_MEDIA_4_DOW*/sci*" 20 ns; +#MULTICYCLE FROM CELL "THE_MEDIA_4_DOW*/sci*" 20 ns; +#MULTICYCLE TO CELL "THE_MEDIA_4_DOW*/PROC_SCI_CTRL.wa*" 20 ns; BLOCK PATH TO CLKNET "THE_MEDIA_4_DOW*/sci_write_i"; BLOCK PATH FROM CLKNET "THE_MEDIA_4_DOW*/sci_write_i"; BLOCK PATH TO CLKNET "THE_MEDIA_4_DOW*/sci_read_i"; @@ -34,33 +34,33 @@ MULTICYCLE TO CLKNET "THE_MEDIA_4_DOW*/sci_write_i" 15 ns; MULTICYCLE FROM CLKNET "THE_MEDIA_4_DOW*/sci_write_i" 15 ns; -MULTICYCLE TO CELL "THE_MEDIA_INTERFACE/sci*" 20 ns; -MULTICYCLE FROM CELL "THE_MEDIA_INTERFACE/sci*" 20 ns; -MULTICYCLE TO CELL "THE_MEDIA_INTERFACE/PROC_SCI_CTRL.wa*" 20 ns; -BLOCK PATH TO CLKNET "THE_MEDIA_INTERFACE/sci_write_i"; -BLOCK PATH FROM CLKNET "THE_MEDIA_INTERFACE/sci_write_i"; -BLOCK PATH TO CLKNET "THE_MEDIA_INTERFACE/sci_read_i"; -BLOCK PATH FROM CLKNET "THE_MEDIA_INTERFACE/sci_read_i"; -MULTICYCLE TO CLKNET "THE_MEDIA_INTERFACE/sci_read_i" 15 ns; -MULTICYCLE FROM CLKNET "THE_MEDIA_INTERFACE/sci_read_i" 15 ns; -MULTICYCLE TO CLKNET "THE_MEDIA_INTERFACE/sci_write_i" 15 ns; -MULTICYCLE FROM CLKNET "THE_MEDIA_INTERFACE/sci_write_i" 15 ns; - - -MULTICYCLE TO CELL "gen_PCSD.THE_MEDIA_PCSD/sci*" 20 ns; -MULTICYCLE FROM CELL "gen_PCSD.THE_MEDIA_PCSD/sci*" 20 ns; -MULTICYCLE TO CELL "gen_PCSD.THE_MEDIA_PCSD/PROC_SCI_CTRL.wa*" 20 ns; -BLOCK PATH TO CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_write_i"; -BLOCK PATH FROM CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_write_i"; -BLOCK PATH TO CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_read_i"; -BLOCK PATH FROM CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_read_i"; -MULTICYCLE TO CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_read_i" 15 ns; -MULTICYCLE FROM CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_read_i" 15 ns; -MULTICYCLE TO CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_write_i" 15 ns; -MULTICYCLE FROM CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_write_i" 15 ns; - -MULTICYCLE TO ASIC "THE_MEDIA*/THE_SERDES/PCSD_INST" PIN SCIRD 15 ns; -MAXDELAY TO ASIC "THE_MEDIA*/THE_SERDES/PCSD_INST" PIN SCIRD 15 ns; +#MULTICYCLE TO CELL "THE_MEDIA_INTERFACE/sci*" 20 ns; +#MULTICYCLE FROM CELL "THE_MEDIA_INTERFACE/sci*" 20 ns; +#MULTICYCLE TO CELL "THE_MEDIA_INTERFACE/PROC_SCI_CTRL.wa*" 20 ns; +#BLOCK PATH TO CLKNET "THE_MEDIA_INTERFACE/sci_write_i"; +#BLOCK PATH FROM CLKNET "THE_MEDIA_INTERFACE/sci_write_i"; +#BLOCK PATH TO CLKNET "THE_MEDIA_INTERFACE/sci_read_i"; +#BLOCK PATH FROM CLKNET "THE_MEDIA_INTERFACE/sci_read_i"; +#MULTICYCLE TO CLKNET "THE_MEDIA_INTERFACE/sci_read_i" 15 ns; +#MULTICYCLE FROM CLKNET "THE_MEDIA_INTERFACE/sci_read_i" 15 ns; +#MULTICYCLE TO CLKNET "THE_MEDIA_INTERFACE/sci_write_i" 15 ns; +#MULTICYCLE FROM CLKNET "THE_MEDIA_INTERFACE/sci_write_i" 15 ns; +# +# +#MULTICYCLE TO CELL "gen_PCSD.THE_MEDIA_PCSD/sci*" 20 ns; +#MULTICYCLE FROM CELL "gen_PCSD.THE_MEDIA_PCSD/sci*" 20 ns; +#MULTICYCLE TO CELL "gen_PCSD.THE_MEDIA_PCSD/PROC_SCI_CTRL.wa*" 20 ns; +#BLOCK PATH TO CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_write_i"; +#BLOCK PATH FROM CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_write_i"; +#BLOCK PATH TO CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_read_i"; +#BLOCK PATH FROM CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_read_i"; +#MULTICYCLE TO CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_read_i" 15 ns; +#MULTICYCLE FROM CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_read_i" 15 ns; +#MULTICYCLE TO CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_write_i" 15 ns; +#MULTICYCLE FROM CLKNET "gen_PCSD.THE_MEDIA_PCSD/sci_write_i" 15 ns; +# +#MULTICYCLE TO ASIC "THE_MEDIA*/THE_SERDES/PCSD_INST" PIN SCIRD 15 ns; +#MAXDELAY TO ASIC "THE_MEDIA*/THE_SERDES/PCSD_INST" PIN SCIRD 15 ns; # # #GbE Part diff --git a/backplanemaster/trb3sc_master.vhd b/backplanemaster/trb3sc_master.vhd index ec0584a..bf03c21 100644 --- a/backplanemaster/trb3sc_master.vhd +++ b/backplanemaster/trb3sc_master.vhd @@ -257,7 +257,7 @@ THE_MEDIA_INT_MIXED : entity work.med_ecp3_sfp_sync_4_slave3 --PCSB SD_LOS_IN(2) => backplane_rx_present(5), SD_TXDIS_OUT(2) => backplane_tx_present(5), SD_PRSNT_N_IN(3) => SFP_MOD0(1), - SD_LOS_IN(3) => '0', --SFP_LOS(1), + SD_LOS_IN(3) => SFP_LOS(1), SD_TXDIS_OUT(3) => SFP_TX_DIS(1), --Control Interface BUS_RX => bussci2_rx, -- 2.43.0