From f63a42a5cb36cc42c6fc107f785b707036c1429d Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Tue, 2 Nov 2021 18:27:10 +0100 Subject: [PATCH] fix readback of df35 register (mult logic 0) --- base/code/input_to_trigger_logic_record.vhd | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/base/code/input_to_trigger_logic_record.vhd b/base/code/input_to_trigger_logic_record.vhd index 05f86f1..de8c913 100644 --- a/base/code/input_to_trigger_logic_record.vhd +++ b/base/code/input_to_trigger_logic_record.vhd @@ -218,7 +218,7 @@ begin elsif BUS_RX.addr(6 downto 0) = "0110100" then BUS_TX.data <= edge_enable & set_output_coin & set_output_mult(0) & set_output_simplecoin; elsif BUS_RX.addr(6 downto 0) = "0110101" and INPUTS > 32 then - BUS_TX.data <= multiplicity_enable(1)(63 downto 32); + BUS_TX.data <= multiplicity_enable(0)(63 downto 32); elsif BUS_RX.addr(6 downto 0) = "0110110" then BUS_TX.data <= x"00000" & "000" & set_stretchedge & "00" & std_logic_vector(set_stretcher); elsif BUS_RX.addr(6 downto 0) = "0110111" then -- 2.43.0