From b7b46fd0eb83b50377aabc9d380bd4ce4cc739f6 Mon Sep 17 00:00:00 2001 From: Jan Michel Date: Fri, 10 Feb 2023 13:44:50 +0100 Subject: [PATCH] add gbe ecp5 ram for new ping --- gbe_trb/ipcores/ecp3/ram_dp_true_2kx9.ipx | 8 + gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.lpc | 56 +++++ gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.sbx | 269 ++++++++++++++++++++++ gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.vhd | 157 +++++++++++++ 4 files changed, 490 insertions(+) create mode 100644 gbe_trb/ipcores/ecp3/ram_dp_true_2kx9.ipx create mode 100644 gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.lpc create mode 100644 gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.sbx create mode 100644 gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.vhd diff --git a/gbe_trb/ipcores/ecp3/ram_dp_true_2kx9.ipx b/gbe_trb/ipcores/ecp3/ram_dp_true_2kx9.ipx new file mode 100644 index 0000000..190660f --- /dev/null +++ b/gbe_trb/ipcores/ecp3/ram_dp_true_2kx9.ipx @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.lpc b/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.lpc new file mode 100644 index 0000000..db89b8f --- /dev/null +++ b/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.lpc @@ -0,0 +1,56 @@ +[Device] +Family=ecp5um +PartType=LFE5UM-45F +PartName=LFE5UM-45F-8BG381C +SpeedGrade=8 +Package=CABGA381 +OperatingCondition=COM +Status=P + +[IP] +VendorName=Lattice Semiconductor Corporation +CoreType=LPM +CoreStatus=Demo +CoreName=RAM_DP_TRUE +CoreRevision=7.5 +ModuleName=ram_dp_true_2kx9 +SourceFormat=vhdl +ParameterFileVersion=1.0 +Date=02/09/2023 +Time=11:11:15 + +[Parameters] +Verilog=0 +VHDL=1 +EDIF=1 +Destination=Synplicity +Expression=BusA(0 to 7) +Order=Big Endian [MSB:LSB] +IO=0 +RAddress=2048 +RData=9 +WAddress=2048 +WData=9 +ROutputEn=0 +RClockEn=0 +WOutputEn=0 +WClockEn=0 +enByte=0 +ByteSize=9 +Optimization=Speed +Reset=Sync +Reset1=Sync +Init=0 +MemFile= +MemFormat=bin +EnECC=0 +Pipeline=0 +WriteA=Normal +WriteB=Normal +init_data=0 + +[FilesGenerated] +=mem + +[Command] +cmd_line= -w -n ram_dp_true_2kx9 -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ramdp -device LFE5UM-45F -aaddr_width 11 -widtha 9 -baddr_width 11 -widthb 9 -anum_words 2048 -bnum_words 2048 -cascade -1 -mem_init0 -writemodeA NORMAL -writemodeB NORMAL diff --git a/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.sbx b/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.sbx new file mode 100644 index 0000000..e3d036c --- /dev/null +++ b/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.sbx @@ -0,0 +1,269 @@ + + + + Lattice Semiconductor Corporation + LEGACY + RAM_DP_TRUE + 7.5 + + + Diamond_Simulation + simulation + + ./ram_dp_true_2kx9.vhd + vhdlSource + + + + Diamond_Synthesis + synthesis + + ./ram_dp_true_2kx9.vhd + vhdlSource + + + + + + Configuration + none + ${sbp_path}/generate_core.tcl + CONFIG + + + + + + + + LFE5UM-45F-8BG381C + synplify + 2023-02-09.11:11:28 + 2023-02-09.11:11:28 + 3.12.1.454 + VHDL + + false + false + false + false + false + false + false + false + false + false + LPM + PRIMARY + PRIMARY + false + false + + + + + + Family + ecp5um + + + OperatingCondition + COM + + + Package + CABGA381 + + + PartName + LFE5UM-45F-8BG381C + + + PartType + LFE5UM-45F + + + SpeedGrade + 8 + + + Status + P + + + + CoreName + RAM_DP_TRUE + + + CoreRevision + 7.5 + + + CoreStatus + Demo + + + CoreType + LPM + + + Date + 02/09/2023 + + + ModuleName + ram_dp_true_2kx9 + + + ParameterFileVersion + 1.0 + + + SourceFormat + vhdl + + + Time + 11:11:15 + + + VendorName + Lattice Semiconductor Corporation + + + + ByteSize + 9 + + + Destination + Synplicity + + + EDIF + 1 + + + EnECC + 0 + + + Expression + BusA(0 to 7) + + + IO + 0 + + + Init + 0 + + + MemFile + + + + MemFormat + bin + + + Optimization + Speed + + + Order + Big Endian [MSB:LSB] + + + Pipeline + 0 + + + RAddress + 2048 + + + RClockEn + 0 + + + RData + 9 + + + ROutputEn + 0 + + + Reset + Sync + + + Reset1 + Sync + + + VHDL + 1 + + + Verilog + 0 + + + WAddress + 2048 + + + WClockEn + 0 + + + WData + 9 + + + WOutputEn + 0 + + + WriteA + Normal + + + WriteB + Normal + + + enByte + 0 + + + init_data + 0 + + + + + mem + + + + cmd_line + -w -n ram_dp_true_2kx9 -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type ramdp -device LFE5UM-45F -aaddr_width 11 -widtha 9 -baddr_width 11 -widthb 9 -anum_words 2048 -bnum_words 2048 -cascade -1 -mem_init0 -writemodeA NORMAL -writemodeB NORMAL + + + + + + + LATTICE + LOCAL + ram_dp_true_2kx9 + 1.0 + + + + diff --git a/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.vhd b/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.vhd new file mode 100644 index 0000000..602a413 --- /dev/null +++ b/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9.vhd @@ -0,0 +1,157 @@ +-- VHDL netlist generated by SCUBA Diamond (64-bit) 3.12.1.454 +-- Module Version: 7.5 +--/d/jspc29/lattice/diamond/3.12/ispfpga/bin/lin64/scuba -w -n ram_dp_true_2kx9 -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00m -type bram -wp 11 -rp 1010 -data_width 9 -rdata_width 9 -num_rows 2048 -cascade -1 -mem_init0 -writemodeA NORMAL -writemodeB NORMAL -fdc /local/trb/git/trbnet/gbe_trb/ipcores/ecp5/ram_dp_true_2kx9/ram_dp_true_2kx9.fdc + +-- Thu Feb 9 11:11:28 2023 + +library IEEE; +use IEEE.std_logic_1164.all; +library ecp5um; +use ecp5um.components.all; + +entity ram_dp_true_2kx9 is + port ( + DataInA: in std_logic_vector(8 downto 0); + DataInB: in std_logic_vector(8 downto 0); + AddressA: in std_logic_vector(10 downto 0); + AddressB: in std_logic_vector(10 downto 0); + ClockA: in std_logic; + ClockB: in std_logic; + ClockEnA: in std_logic; + ClockEnB: in std_logic; + WrA: in std_logic; + WrB: in std_logic; + ResetA: in std_logic; + ResetB: in std_logic; + QA: out std_logic_vector(8 downto 0); + QB: out std_logic_vector(8 downto 0)); +end ram_dp_true_2kx9; + +architecture Structure of ram_dp_true_2kx9 is + + -- internal signal declarations + signal scuba_vhi: std_logic; + signal scuba_vlo: std_logic; + + attribute MEM_LPC_FILE : string; + attribute MEM_INIT_FILE : string; + attribute MEM_LPC_FILE of ram_dp_true_2kx9_0_0_0 : label is "ram_dp_true_2kx9.lpc"; + attribute MEM_INIT_FILE of ram_dp_true_2kx9_0_0_0 : label is "INIT_ALL_0s"; + attribute NGD_DRC_MASK : integer; + attribute NGD_DRC_MASK of Structure : architecture is 1; + +begin + -- component instantiation statements + scuba_vhi_inst: VHI + port map (Z=>scuba_vhi); + + scuba_vlo_inst: VLO + port map (Z=>scuba_vlo); + + ram_dp_true_2kx9_0_0_0: DP16KD + generic map (INIT_DATA=> "STATIC", ASYNC_RESET_RELEASE=> "SYNC", + INITVAL_3F=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_3E=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_3D=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_3C=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_3B=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_3A=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_39=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_38=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_37=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_36=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_35=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_34=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_33=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_32=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_31=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_30=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_2F=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_2E=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_2D=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_2C=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_2B=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_2A=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_29=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_28=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_27=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_26=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_25=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_24=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_23=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_22=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_21=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_20=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_1F=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_1E=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_1D=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_1C=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_1B=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_1A=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_19=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_18=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_17=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_16=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_15=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_14=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_13=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_12=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_11=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_10=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_0F=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_0E=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_0D=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_0C=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_0B=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_0A=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_09=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_08=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_07=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_06=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_05=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_04=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_03=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_02=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_01=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + INITVAL_00=> "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000", + CSDECODE_B=> "0b000", CSDECODE_A=> "0b000", WRITEMODE_B=> "NORMAL", + WRITEMODE_A=> "NORMAL", GSR=> "ENABLED", RESETMODE=> "ASYNC", + REGMODE_B=> "NOREG", REGMODE_A=> "NOREG", DATA_WIDTH_B=> 9, + DATA_WIDTH_A=> 9) + port map (DIA17=>scuba_vlo, DIA16=>scuba_vlo, DIA15=>scuba_vlo, + DIA14=>scuba_vlo, DIA13=>scuba_vlo, DIA12=>scuba_vlo, + DIA11=>scuba_vlo, DIA10=>scuba_vlo, DIA9=>scuba_vlo, + DIA8=>DataInA(8), DIA7=>DataInA(7), DIA6=>DataInA(6), + DIA5=>DataInA(5), DIA4=>DataInA(4), DIA3=>DataInA(3), + DIA2=>DataInA(2), DIA1=>DataInA(1), DIA0=>DataInA(0), + ADA13=>AddressA(10), ADA12=>AddressA(9), ADA11=>AddressA(8), + ADA10=>AddressA(7), ADA9=>AddressA(6), ADA8=>AddressA(5), + ADA7=>AddressA(4), ADA6=>AddressA(3), ADA5=>AddressA(2), + ADA4=>AddressA(1), ADA3=>AddressA(0), ADA2=>scuba_vlo, + ADA1=>scuba_vlo, ADA0=>scuba_vlo, CEA=>ClockEnA, + OCEA=>ClockEnA, CLKA=>ClockA, WEA=>WrA, CSA2=>scuba_vlo, + CSA1=>scuba_vlo, CSA0=>scuba_vlo, RSTA=>ResetA, + DIB17=>scuba_vlo, DIB16=>scuba_vlo, DIB15=>scuba_vlo, + DIB14=>scuba_vlo, DIB13=>scuba_vlo, DIB12=>scuba_vlo, + DIB11=>scuba_vlo, DIB10=>scuba_vlo, DIB9=>scuba_vlo, + DIB8=>DataInB(8), DIB7=>DataInB(7), DIB6=>DataInB(6), + DIB5=>DataInB(5), DIB4=>DataInB(4), DIB3=>DataInB(3), + DIB2=>DataInB(2), DIB1=>DataInB(1), DIB0=>DataInB(0), + ADB13=>AddressB(10), ADB12=>AddressB(9), ADB11=>AddressB(8), + ADB10=>AddressB(7), ADB9=>AddressB(6), ADB8=>AddressB(5), + ADB7=>AddressB(4), ADB6=>AddressB(3), ADB5=>AddressB(2), + ADB4=>AddressB(1), ADB3=>AddressB(0), ADB2=>scuba_vlo, + ADB1=>scuba_vlo, ADB0=>scuba_vlo, CEB=>ClockEnB, + OCEB=>ClockEnB, CLKB=>ClockB, WEB=>WrB, CSB2=>scuba_vlo, + CSB1=>scuba_vlo, CSB0=>scuba_vlo, RSTB=>ResetB, DOA17=>open, + DOA16=>open, DOA15=>open, DOA14=>open, DOA13=>open, + DOA12=>open, DOA11=>open, DOA10=>open, DOA9=>open, + DOA8=>QA(8), DOA7=>QA(7), DOA6=>QA(6), DOA5=>QA(5), + DOA4=>QA(4), DOA3=>QA(3), DOA2=>QA(2), DOA1=>QA(1), + DOA0=>QA(0), DOB17=>open, DOB16=>open, DOB15=>open, + DOB14=>open, DOB13=>open, DOB12=>open, DOB11=>open, + DOB10=>open, DOB9=>open, DOB8=>QB(8), DOB7=>QB(7), + DOB6=>QB(6), DOB5=>QB(5), DOB4=>QB(4), DOB3=>QB(3), + DOB2=>QB(2), DOB1=>QB(1), DOB0=>QB(0)); + +end Structure; -- 2.43.0