]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/shortlog
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2014-12-08 Andreas NeiserADC: Sim: use relative path names, work library still...
2014-12-05 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2014-12-05 Cahitcalibration and data trigger switching problem is fixed
2014-12-05 Jan Micheladded buffer size setting to config file of 32pin AddOn
2014-12-05 Jan Micheladded included features to ADC config file
2014-12-05 Jan Micheladded few more control registers for ADC
2014-12-04 Andreas NeiserCTS: map needs correct arguments...args
2014-12-04 Cahitprojects made compatible with tdc_v2.0.0
2014-12-04 Cahittrigger window bug fix and constraints update for v2.0.0
2014-12-03 Cahitconflict fix
2014-12-03 Cahittdc_v1.6.3 is made back compatible
2014-12-03 Cahitencoder name correctiongit add Channel.vhd Channel_200...
2014-12-03 Andreas NeiserCTS: Minor compile scripts fixes
2014-12-02 Manuel PenschuckCTS: Clock select based on config-constant
2014-12-02 Manuel PenschuckCTS: ITC on input mux
2014-12-02 Manuel PenschuckCTS: Total dead time counter
2014-12-02 Andreas NeiserCTS: Compile script uses single core par, fix bitgen...
2014-12-02 Andreas NeiserCTS: Remove DRIVE for JTTL ports
2014-12-02 Andreas NeiserShould be rom_encoder_3...
2014-12-02 Andreas NeiserCTS: Make it work if no CBM but TDC is enabled
2014-12-02 Andreas NeiserCTS compile script fixes to make it work for Manuel...
2014-12-02 Andreas NeiserCTS changes to make 1.7.x / 1.6.3 TDC switch easier
2014-12-02 Andreas NeiserTDC 1.6.3 changes to conform with 1.7.x component handling
2014-12-02 Cahitrom encoder update for tdc 1.6.3
2014-12-02 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2014-12-02 Cahittdc_components.vhd for tdc version 1.6.x
2014-12-02 Andreas NeiserCTS: Compile on lxhadeb07 does not work...Synplify...
2014-12-02 Andreas NeiserCTS: Compile scripts updated, syncing config.vhd
2014-12-01 Jan Michelupdate ADC code
2014-12-01 Cahit32PinAddOn Design updated for tdc_v2.0
2014-12-01 Cahittdc release notes update
2014-12-01 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2014-12-01 CahitGPIN addon design pin correction
2014-12-01 Cahittop files and component files for the tdc version 2.0
2014-12-01 Cahitunnecessary files are removed from tdc test folder
2014-12-01 Cahitconstraints update for version 1.6.3
2014-12-01 Cahittdc_v2.0 release
2014-11-28 Andreas NeiserADC: correct address range to include invalid words...
2014-11-28 Jan Michelone more attribute to get timing right
2014-11-21 Jan Michelfixed timeout on sctrl bus in hub without gbe
2014-11-06 Manuel PenschuckCBMNet: Reboot DLM availabe (send 3 DLMS: 0xd, 0x1...
2014-11-06 Manuel PenschuckCTS: JTTL(15) functions as reboot input (provide 1...
2014-11-03 Manuel PenschuckCBMNet: Reminder to myself: Don't connect the Reset...
2014-11-03 Manuel PenschuckCTS: Back up TDC 1.6.3, Better constraints for design
2014-11-03 Manuel PenschuckCBMNet: Test design compatible to bridge, test-lines...
2014-11-03 Manuel PenschuckMBS-Recv(+Billboard): Introduced optional Timestamps...
2014-11-03 Manuel PenschuckCBMNet: Misc. Clean-Up
2014-11-03 Manuel PenschuckCBMNet: Remove OBuf as not required anymore
2014-11-03 Manuel PenschuckCBMNet: Undo new-style CTRLBUS as incompatible with...
2014-10-26 Manuel PenschuckCTS: Migrated back to TDC 1.6.3 and code clean up
2014-10-26 Manuel PenschuckCTS: Migrated back to TDC 1.6.3 and code clean up
2014-10-26 Manuel PenschuckCBMNet: PCS-Reset issued when receive a Link-Reinit...
2014-10-26 Manuel PenschuckBillboard: Corrected HW-ID
2014-10-26 Manuel PenschuckMerge conflict
2014-10-26 Jan Micheladded checker for ADC words
2014-10-25 Manuel PenschuckCBMNET: TX-GEAR back-up
2014-10-24 Manuel PenschuckAdd Billboard design (includes storage billboard and...
2014-10-23 Jan Micheladded sed checker to ADC design
2014-10-23 Manuel PenschuckCTS: Backup before migrating to TDC v1.6.3 and MBS
2014-10-20 Cahitsymbolic links for the top entities
2014-10-20 Cahitconflict fix
2014-10-20 Cahittdc release 2.0.xx
2014-10-20 Cahittdc release 1.7.xx
2014-10-20 Cahittop file update for designs
2014-10-20 Cahitbase folder update
2014-10-20 Cahitwasa design update
2014-10-20 CahitADA Addon design update
2014-10-20 Cahit32PinAddOn design update
2014-10-20 Cahitcbmtof design update
2014-10-20 Cahitnew pll core
2014-10-20 Andreas NeiserADC: Compile script now actually works...
2014-10-20 Cahitremove obselete files
2014-10-20 Andreas NeiserADC: Patch compile script for GSI machines
2014-10-18 Manuel PenschuckCBMNet: Script to convert TrbNet into CBMNet time using...
2014-10-16 Manuel PenschuckCTS: Timestamp-Included flag was missing in the CTS...
2014-10-16 Manuel PenschuckCTS: Included bigger CBMNET read-out buffer in project...
2014-10-16 Manuel PenschuckCBMNET: Adopted peripherial test design to new pattern...
2014-10-16 Manuel PenschuckCBMNet: Private tool to analyse sync-scheme of bridge
2014-10-16 Manuel PenschuckCBMNet: Increase read-out buffer to 128 kb, TrbNet...
2014-10-15 Manuel PenschuckCreateProject: Now supports verilog-includePath and...
2014-10-15 Manuel PenschuckCBMNet: Test design adopted to new cbmnet_bridge component
2014-10-14 Manuel PenschuckCTS: Included TDC v1.7.1 and replace individual CBMNET...
2014-10-14 Manuel PenschuckTrigger and Clock Select (not working, but commit neces...
2014-10-14 Manuel PenschuckCBMNet: Encapsulated whole stack into a dedicated entity
2014-10-14 Manuel PenschuckCBMNET: Fine-Tuning of PHY
2014-10-10 Jan Michellatest version of ADC code. Processor seems to be fine...
2014-10-10 Jan Micheladded clock for power converters to central FPGA
2014-10-06 Jan MichelLatest version of adc code, with status trigger
2014-09-30 Jan Micheladded SED to hub design and switched to new Diamond
2014-09-30 Jan Micheladded 4 MHz clock output for Enpirion regulators
2014-09-28 Manuel PenschuckCTS: Back-Up before migrating to CBMNet LPv3
2014-09-28 Manuel PenschuckCBM: Wrong status bits for event packer; CTS: clean up
2014-09-24 Manuel PenschuckCBM: Timing issues in sync module due to meta-stab...
2014-09-22 Manuel PenschuckCTS: Included sync module, introduced new constraints...
2014-09-22 Manuel PenschuckCBMNet: First version of sync-module (not fully tested...
2014-09-19 Jan Michelchanged SED checker to use new record based control...
2014-09-15 Jan Michelchanged reset behavior of external clock selection...
2014-09-05 Jan Michellatest adc handler. acknowledges triggers, no readout
2014-08-21 Ludwig MaierRevert "cleanup adc handler"
2014-08-21 Ludwig MaierRevert "tmp"
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