]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/shortlog
trb3.git
2015-06-20 Andreas NeiserFor v1.6.3, DEBUG should be enabled, but we skip using...
2015-06-19 Andreas NeiserUse settings from CTS design
2015-06-19 Andreas NeiserRevert "Produces at least working hitcounters"
2015-06-19 Andreas NeiserProduces at least working hitcounters
2015-06-18 Andreas NeiserFinal fixes for constraints
2015-06-18 Andreas NeiserLast constraints which were missing...
2015-06-18 Andreas NeiserMinor constraint fixes
2015-06-18 Andreas NeiserAfter talking to Cahit, hopefulle no map warnings anymore
2015-06-18 Andreas NeiserMake it safe
2015-06-18 Andreas NeiserIncrease MAXDELAY (might be wrong...)
2015-06-18 Andreas NeiserLet's see if this matches for busy_in_sys MULTICYCLE
2015-06-18 Andreas NeiserAnother try to fix TDC timings
2015-06-17 Andreas NeiserMaybe this works better for timing
2015-06-17 Andreas NeiserGo back to "Compiles at least"
2015-06-17 Andreas NeiserJust try with different diamond again
2015-06-17 Andreas NeiserRevert "Revert to Diamond 2.1 and TDC v1.6.3"
2015-06-17 Andreas NeiserRevert "Compiles at least"
2015-06-17 Andreas NeiserCompiles at least
2015-06-17 Andreas NeiserRevert to Diamond 2.1 and TDC v1.6.3
2015-06-13 Andreas NeiserCTS: At least compiles
2015-06-13 Andreas NeiserCTS: Make Mainz A2 receiver module work again (hopefully)
2015-06-13 Andreas NeiserCTS: More technical updates/changes
2015-06-13 Andreas NeiserLet's try with this ADC phase determination
2015-06-13 Andreas NeiserRevert "Revert "Changes for new record-based interface...
2015-06-13 Andreas NeiserRevert "Changes for new record-based interface to FEE...
2015-06-13 Andreas NeiserRegister the global epoch counter when distributing
2015-06-13 Andreas NeiserTry to fix readout bug
2015-06-13 Andreas NeiserMinor fix
2015-06-13 Andreas NeiserChanges for new record-based interface to FEE readout
2015-06-13 Andreas NeiserRework the EPOCH counter handling
2015-06-13 Andreas NeiserUse correct channel input for TDC, should not change...
2015-06-13 Andreas NeiserFix little TDC ctrl reg bug
2015-06-13 Andreas NeiserForgot to change one constraint for newer Diamond versi...
2015-06-13 Andreas NeiserFix MULTICYCLE statement
2015-06-13 Andreas NeiserMake DEBUG completely synchronous
2015-06-13 Andreas NeiserUse par instead of mpartrce
2015-06-13 Andreas NeiserMake tdc_ctrl_reg less strictly timed
2015-06-13 Andreas NeiserMake regions larger, maybe that's enough to get par...
2015-06-13 Andreas NeiserMake regions larger, maybe that's enough to get par...
2015-06-13 Andreas NeiserCreate lpf symlink for newer diamond versions in create...
2015-06-13 Andreas NeiserSkip ADC1, also problematic...
2015-06-13 Andreas Neiseradd dqs 6x5 to project file
2015-06-13 Andreas NeiserRemove ADC5 of left side as well
2015-06-13 Andreas NeiserAdding ipx files back
2015-06-13 Andreas NeiserAdd dqsinput 6x5, add 4x5 ipx file
2015-06-13 Andreas NeiserForgot ADC_DCO skip of ADC10
2015-06-13 Andreas NeiserRevert "Another try to properly disable the problematic...
2015-06-13 Andreas NeiserAnother try to properly disable the problematic ADC
2015-06-13 Andreas NeiserAdd dqsinput_4x5 file to project
2015-06-13 Andreas NeiserSkip ADC10 for lattice >2.1 compatibility
2015-06-13 Andreas NeiserRevert "Minimal change to hopefully fix par error at...
2015-06-13 Andreas Neiseradding dqsinput 4x5, removing ipx files
2015-06-13 Andreas NeiserMinimal change to hopefully fix par error at M22 site
2015-06-13 Andreas NeiserAdding more TDC constraints manually
2015-06-13 Andreas NeiserRevert "Switching back to Lattice 2.1, since some Pins...
2015-06-13 Andreas NeiserRevert "Minor fix in LPF"
2015-06-13 Andreas NeiserMinor fix in LPF
2015-06-13 Andreas NeiserSwitching back to Lattice 2.1, since some Pins are...
2015-06-13 Andreas NeiserFix correct ADC selection for TDC input
2015-06-13 Andreas NeiserAdding hopefully reasonable input to TDC
2015-06-13 Andreas NeiserMake space for TDC
2015-06-13 Andreas NeiserTDC constraints (untested), needs smaller ADC regions
2015-06-13 Andreas NeiserSwitching to recommended synplify
2015-06-13 Andreas NeiserRegistering debug signals, fixes strange synplify error...
2015-06-13 Andreas NeiserRewrite TDC control reg handling
2015-06-13 Andreas NeiserFixing compile errors/warnings
2015-06-13 Andreas NeiserReformat config.vhd, add missing TDC constants
2015-06-13 Andreas NeiserExtending compile_constraints to optionally include TDC
2015-06-13 Andreas NeiserAdding the TDC entity (untested)
2015-06-13 Andreas NeiserRevert "Refine delay"
2015-06-13 Andreas NeiserRevert "Make delay=0 totally correct, for testing in...
2015-06-13 Andreas NeiserRevert "Add edge samples dump, timing untested"
2015-06-13 Andreas NeiserTry with 80 again
2015-06-13 Andreas NeiserImprove simulation of noisy signal
2015-06-13 Andreas NeiserFix media region location
2015-06-13 Andreas NeiserIncrease REGION sizes
2015-06-13 Andreas NeiserMinor simulation changes
2015-06-13 Andreas NeiserFix simulation
2015-06-13 Andreas NeiserAdd edge samples dump, timing untested
2015-06-13 Andreas NeiserSnapshot simulation changes
2015-06-13 Andreas NeiserAdd one bit to baseline average
2015-06-13 Andreas NeiserMake delay=0 totally correct, for testing in firmware
2015-06-13 Andreas NeiserRefine delay
2015-06-13 Andreas NeiserSet one bit to prevent becoming end marker
2015-06-13 Andreas NeiserAnother fix for readout words, run with 24 cores only
2015-06-13 Andreas NeiserMake readout more compatible
2015-06-13 Andreas NeiserAdding missing config registers
2015-06-13 Andreas NeiserSimulation changes
2015-06-13 Andreas NeiserFix missing comma
2015-06-13 Andreas NeiserRemove padding word
2015-06-13 Andreas NeiserImplement DebugMode
2015-06-13 Andreas NeiserImplementing channel disable
2015-06-13 Andreas NeiserMake busy signal synced for all four channels
2015-06-13 Andreas NeiserIntroduce processing mode
2015-06-13 Andreas NeiserMulticycle for debug state signal
2015-06-13 Andreas NeiserTry with 64 MHz, 80 seems a little bit unstable on...
2015-06-13 Andreas Neiserback to 32 cores
2015-06-13 Andreas NeiserMulticycle on busy_in, maybe that produces a timing...
2015-06-13 Andreas Neiseradd specific multicycle to config register
2015-06-13 Andreas Neisersnapshot modelsim
next