]> jspc29.x-matter.uni-frankfurt.de Git - tdc.git/shortlog
tdc.git
2018-08-16 Jan Michelmove channels 31/32 closer to their logic v2.3
2018-08-16 Jan MichelChange stretcher output to left side, increase length...
2018-08-10 Jan Michelupdate ADA and 4conn design with new trigger logic...
2018-07-10 Jan Michelupdate .gitignore
2018-07-10 Jan Micheladd Modelsim testbench project
2018-07-10 Jan Michelcleanup of unnecessary signals
2018-07-10 Jan Michelchange ring buffer almost full handling - now single...
2018-07-10 Jan Micheladding testbench for one channel
2018-07-05 Jan Michelcleaning unused signals
2018-07-04 Jan Michelfix placement for channels ref,31,32
2018-07-04 Jan Michelremove Latches on epoch counter register
2018-07-02 Jan Michelvalidate trigger must not do checks on its own
2018-07-02 Jan Michelfixed missing trailer word if last channel has data
2018-06-14 Jan Michelfix reaction to timeout of reference time, remove paral...
2018-06-14 Jan Michelsome clean-up to signals
2018-04-03 Jan Michelhit_cal registered to prevent glitches
2018-04-03 Jan MichelAdd new calibration PLL for DiRich 3
2018-03-07 Jan Michelre-add PLL to calibration signal generation
2018-03-05 Jan MichelRefine calibration timing. Fix montioring inputs for...
2018-02-09 Jan MichelRemove PLL from calibration clock source
2018-02-02 Jan MichelFix placement of logic in regions. Fix detection of...
2018-01-22 Jan Michelcleanup of some code issues
2018-01-19 Jan Michelremove outdated ports from design
2018-01-19 Jan Michelall designs use Encoder_288
2018-01-11 Jan Micheladd encoder file
2017-12-22 Jan MichelUpdate some constraints
2017-11-02 Jan MichelAdd files from Cahit, compiles for Dirich
2017-10-23 Jan Micheladd pinout for hptdc to ADA, change clock source
2017-10-23 Jan Michelupdate some constraints
2017-09-28 Jan Michelremove Serdes ports
2017-09-28 Jan Micheladd slow control registers
2017-09-20 Jan Michelfix SPI ports on ADA AddOn
2017-08-08 Jan Michelregister fsm_wr_debug for better timing
2017-08-08 Jan Micheladded rom_encoder from v2.3 to v2.3.1
2017-04-23 Cahitadding Jan s changes
2017-04-23 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2017-04-23 Cahitadded tdc_v2.3.1
2017-01-23 Jan Michelexchanged some channels for better placement in designs...
2017-01-23 Jan MichelA bit of cleanup in registers
2016-07-15 Cahitupdated constraints
2016-06-26 Cahitadded dirich top module
2016-06-19 Cahitupdated dirich constraints
2016-04-01 Jan Micheladding missing compile script for TDC
2016-03-24 Cahitedited top modules for record types
2016-03-24 Cahitchanged location of enable register for tdc chains...
2016-03-23 Cahitcorrected multicycle constraint
2016-03-23 Cahitupdated encoder rom
2016-03-23 Cahitadded different tdc data format options
2016-03-23 Cahitupdated top modules for trigger inputs
2016-03-23 Cahitadded dirich constraints
2016-03-23 Cahitupdated constraints syntax
2016-03-23 Cahitadded fifo and pll IPs for ecp5
2016-03-23 Cahitupdated chain module for ecp5
2016-03-11 Cahitupdated rom encoder address map
2016-01-26 Cahitupdated release note information
2016-01-26 Cahittidied up the code
2016-01-26 Cahitadded compile time to the data stream with the status...
2016-01-26 Cahitdelayes BUS HANDLER read signal one clock cycle to...
2015-12-16 Cahitupdated 32PinAddOn project top module with record entities
2015-12-10 Cahitadded temperature value in the data stream for status...
2015-12-10 Cahitadded temperature value in the data stream for status...
2015-12-09 Cahitupdated the release notes table and edited export scrip...
2015-12-08 Cahitadded trailer word to the data stream to mark some...
2015-12-08 Cahittidy up
2015-12-07 Cahitreleased tdc_v2.3
2015-12-03 Cahitadded some more multicycle constraints to ease the...
2015-10-23 Cahitupdated constraints file
2015-10-21 Cahitfixed bug for dead channels
2015-10-07 Cahitremoved unused file from the release
2015-10-07 Cahitreleased new tdc version
2015-10-07 Cahitnew FIFO module
2015-09-11 Cahittidy-up
2015-09-11 Cahitadded new FIFO cores
2015-08-21 Cahitupdated tdc release number
2015-08-10 Jan Michelfixing errors in record based files
2015-08-06 Cahitreleased version 2.1.6
2015-06-23 Cahitrelease new tdc version tdc_v2.1.5
2015-06-23 Cahitrelease new tdc version tdc_v2.1.5
2015-06-18 Cahitupdated release notes & extended the export_table.pl...
2015-06-17 CahitAufräumen
2015-06-17 Cahitreleased tdc_v2.1.4
2015-05-18 Cahitreleased tdc version 2.1.3
2015-05-11 Cahitfixed the problem with the missing reference channel...
2015-05-08 Cahitadded new placement constraints for better timing perfo...
2015-05-08 Cahitadded a sync media interface to cbmtof
2015-05-04 Cahitchanged calibration frequency to 33MHz
2015-04-27 Cahitvarious changes in version 2.1.2
2015-04-17 Cahitadded FIFOs for ecp3
2015-04-17 Cahitadded FIFOs for ecp3
2015-03-20 Cahitfirst commit of the tdc repo