]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/shortlog
trb3.git
2014-02-27 Jan Michelmoved PLL into ADC block
2014-02-27 Jan Michelupdated ADC AddOn files
2014-02-27 Jan Micheladded new 40MHz PLL
2014-02-27 Andreas NeiserCTS: Try with Cahits LPF
2014-02-27 Andreas NeiserFinally the linkdesignfiles business works!
2014-02-27 Andreas NeiserCommenting out some unused ngo file links (confirmed...
2014-02-27 Andreas NeiserCommenting out some unused ngo file links (confirmed...
2014-02-27 Andreas NeiserDeleting symlinks in workdir, compilescripts should...
2014-02-27 Andreas NeiserCTS: Adapted more to Frankfurt compile script...previou...
2014-02-26 Andreas NeiserCTS: Bitfile generated with A2 EventId receiver and...
2014-02-26 Andreas NeiserSwitch to TDC v1.6, compiles at least, but still not...
2014-02-26 Andreas NeiserCompiles with v1.5.1, but totally untested any further
2014-02-26 Cahitcompile script adapted for the gsi
2014-02-26 CahitMerge branch 'v1.6'
2014-02-26 Cahittdc_v1.6: first working version
2014-02-26 Andreas NeiserSome improvements for GSI compile scripts, not tested yet
2014-02-24 Jan Micheladded logic for trigger output to central hub
2014-02-24 Jan Michelstarted to implement trigger input statistics
2014-02-24 Jan Michelsome more stuff to ignore
2014-02-24 Jan Michellatest version of start design
2014-02-24 Jan Michelmoved to Diamond 3.0
2014-02-17 Cahitconfig changed to 65 channels
2014-02-17 Ludwig Maiernxyter histogram bug removed, i2c handler update
2014-02-13 Ludwig Maiernxyter update, not working
2014-02-13 Cahitmodified for tdc_v1.6
2014-02-11 Jan Micheladded clock and trigger input selection to GbE design
2014-02-11 Jan Michelsome new files for ADC addon
2014-02-11 Jan Michelnew design for hades start readout
2014-02-11 CahitTop design file for 32PinAddOn is added
2014-02-11 Cahitconflict fix
2014-02-11 Cahitintermediate commit
2014-02-06 Andreas NeiserPadiwa_Amps: Discharge on leading edge of FAST until...
2014-02-05 Andreas NeiserPadiwa: Modify compilation for GSI machine lxhadeb07...
2014-02-03 Jan Micheltrigger generation logic for Hades Start Detector
2014-02-03 Jan MichelAdded ADC design files
2014-01-31 Ludwig Maiernew readout modes
2014-01-28 Ludwig MaierADC I2C readout implemented
2014-01-28 Ludwig Maieradded histograms for pileup and overflow per channel
2014-01-28 Ludwig Maiernxyter working design
2014-01-28 Ludwig Maiernxyter: window ts validation improved
2014-01-28 Ludwig Maiertmp
2014-01-27 Jan Micheladded project for 32PinAddOn, make TDC 1.5.1 compiling...
2014-01-24 Jan Micheladded correct reset for hades hub & other fifo in gbe
2014-01-23 CahitCalibration trigger for the reference channel
2014-01-23 CahitCalibration trigger from the internal oscillator
2014-01-21 Cahitepoch counter bug fix
2014-01-21 Cahitepoch counter bug fix
2014-01-20 Cahitfirst version of the tdc_v1.6
2014-01-03 Jan Michelfixed pixel bug
2014-01-02 Jan Micheladjusted paths
2014-01-02 Jan Micheladded lcd lib for padiwa incl. design
2013-12-19 Jan Michelcorrected mvd roc pinout
2013-11-29 Ludwig Maiernxyter ADC Working, TS Working
2013-11-28 Manuel PenschuckTrigger from peripheral FPGAs
2013-11-26 Jan Michelchanged padiwa test register
2013-11-25 Ludwig Maiernxyter update
2013-11-25 Ludwig Maierall working, hope so
2013-11-25 Ludwig Maierworking ts, adc almost
2013-11-24 Manuel PenschuckUnknown Address instead of Timeout when writing to...
2013-11-20 Ludwig MaierNXYTER working TS so far
2013-11-20 Ludwig Maiernxyter: new i2c handler working
2013-11-20 Jan Michelfirst final padiwa_amps design
2013-11-19 Jan Micheladded design for simple padiwa amps with fixed delay
2013-11-18 Jan MichelAdded lpf for new CB
2013-11-11 Ludwig Maiernew i2c handler
2013-11-11 Ludwig Maiernxyter new adc reset handler
2013-11-10 grzegorz.korcylupdated trb3_central.prj
2013-11-04 Manuel PenschuckImprovements to the CTS AddOn
2013-11-01 Manuel PenschuckCTS AddOn supported added (input multiplexer for JIN1...
2013-11-01 Manuel PenschuckCorrected Site Locations for CTS AddOn
2013-10-24 Ludwig MaierMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2013-10-24 Ludwig Maiernxyter, new working Timestamp Handler, ADC still not...
2013-10-23 Jan Michelupdated trb3_gbe to new gbe
2013-10-23 Jan Michelchanged hub to Diamond 2.1
2013-10-23 Jan Michelchanged CTS compile script for Diamond 2.1
2013-10-22 Manuel PenschuckChanges in order to simulate design
2013-10-22 Manuel PenschuckMerge branch 'master' of jspc27:trb3
2013-10-16 Ludwig MaierMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2013-10-16 Ludwig Maiernxyter updates, cleanup
2013-10-15 Jan Michelupdated central_hub2 design, added mode for central...
2013-10-14 Manuel PenschuckBackup: Design now synthesizable.
2013-10-14 Manuel PenschuckMerge branch 'master' of jspc29:trb3
2013-10-14 Manuel PenschuckAdded Link Tester Modules (cannot synthesize)
2013-10-11 Ludwig MaierMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2013-10-11 Ludwig Maiernxyter update...
2013-10-09 Cahitcorrected region declaration
2013-10-08 Manuel PenschuckBackup (still got 4ns issue)
2013-10-07 Jan Micheladded Diamond project for Padiwa
2013-10-07 Manuel PenschuckTX Gear added, however still buggy
2013-10-04 Ludwig Maiercleanup nxyter stuff
2013-10-03 Manuel PenschuckCBMNet Litte clean up in code
2013-10-03 Manuel PenschuckCBMNet DLM seem to work. Need to measure whether system
2013-10-03 Manuel PenschuckMerge branch 'master' of jspc29:trb3
2013-10-03 Manuel PenschuckPhy finally operational (again)
2013-10-02 Jan Michelcompiling version with ADC PLLs rearranged
2013-10-02 Ludwig Maierjetzt mit fifo_ts_12to12_dc..
2013-10-02 Ludwig MaierMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2013-10-02 Ludwig Maierall is fine
2013-10-02 Ludwig Maierpending
2013-10-02 Ludwig Maierfuck you
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