]> jspc29.x-matter.uni-frankfurt.de Git - trb3sc.git/shortlog
trb3sc.git
2017-09-07 Jan MichelAdd new design for TRB3sc hub
2017-08-11 Jan MichelUpdate backplane master: Use internal clock for sending...
2017-08-11 Jan MichelUpdate hubaddon design
2017-08-11 Jan MichelFix hardcoded buffer sizes for RDO, now read again...
2017-07-26 Jan MichelUpdate ADC AddOn design
2017-07-26 Jan MichelAdd option to not use external clock - needed for ADC...
2017-07-26 Jan MichelUpdate pin-out files for 32pin Addon
2017-07-26 Jan MichelUpdate TRB3sc pulser design
2017-07-26 Jan MichelAdd input monitoring and dummy data to template design
2017-06-22 local accountWorking Verison of FPGA based Calibration
2017-06-22 local accountWorking Verison of FPGA based Calibration
2017-04-20 Jan MichelChange tdctemplate design to 32pin AddOn
2017-01-23 Jan MichelUpdate load settings from flash - better timing
2017-01-23 Jan MichelUpdate Trb3sc template design
2017-01-23 Jan Michelsome updates to placement of trb3s tdc
2016-07-06 Jan MichelStrange behavior of LCD entity solved
2016-06-24 Jan MichelSome minor updates to the TRB3sc ADC AddOn design
2016-05-27 Jan MichelNo triple printing of par report, default for Synplify...
2016-03-23 Jan MichelUpdatine ADC AddOn with debug bus
2016-03-23 Jan MichelRemoving old Serdes I/O ports from designs
2016-03-22 Jan MichelAdd option to compile script to do report file generati...
2016-03-18 Jan MichelUpdate to trb3sc_tdctemplate
2016-03-18 Jan MichelUpdate trb3sc tools with additional register
2016-03-17 Your Nameupdated compile script
2016-03-17 Your Namecompile script extended with gbe links
2016-03-07 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2016-03-07 Cahitmade project compatible with the last tdc version
2016-02-29 Jan Micheladding jed option to compile script
2016-01-07 Jan Micheladding latest changes to compile script and trb3sc_tools
2016-01-06 Jan Michelfixing compile constraints only option
2016-01-06 Jan MichelAdding flexible FPGA type to compile script
2015-12-18 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2015-12-18 Cahitupdated diamond and synplify versions for the compile...
2015-12-17 Jan MichelAdding new feature to pulser AddOn - generating multipl...
2015-12-10 Jan MichelUpdating TRB3sc pulsers for debug UART, disabled in...
2015-12-09 Jan MichelAdding UART debug interface to TDC Template. I/O on...
2015-12-08 Jan MichelAdding a new debugging interface via UART, included...
2015-12-07 Jan Michelchanging clock manager timing again
2015-12-04 Jan MichelChanging name of media interface for backplane master...
2015-12-03 Cahitupdated constraints files
2015-12-02 Jan MichelAdding some test signals to TDC Template design
2015-12-01 Jan MichelAdjusting timeout for external clock detection to allow...
2015-11-27 Jan MichelUpdating backplane master design, increasing region...
2015-11-27 Jan MichelAdding improved CS handling for LCD control.
2015-11-06 Cahitupdated constraints
2015-11-03 Jan MichelAdding settings for (unused) trigger logic to ADC AddOn
2015-11-03 Jan Michel4conn TDC design knows how to show its temperature...
2015-11-03 Jan MichelAdding LCD information to template, changing to Diamond 3.6
2015-11-03 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2015-11-03 Cahitmade project compatible with tdc_v2.2
2015-11-03 Cahitcorrected constraint name
2015-11-03 Cahitupdated compile script for editing constraints file...
2015-10-30 Jan Michelfix numbers of RJIO port
2015-10-28 Jan MichelAdding input monitor and trigger generation to trb3sc_t...
2015-10-26 Jan Michelfixing compile script for errors on lxhadeb07
2015-10-26 Jan Michelreverting to old Synplify version
2015-10-22 Jan Michelupdating ADC with gsi compile script
2015-10-20 Jan MichelTwo new options for compile script: Option to use a...
2015-10-20 Jan MichelAdding design for ADC AddOn on TRB3sc
2015-10-16 Jan Michelnew clock input for media interface in template
2015-10-16 Jan Michela bit of maintenance
2015-10-16 Jan Michelremoved trb3sc_basic.lpf from compile script
2015-10-16 Jan MichelCurrent status of backplane master. Mostly working...
2015-10-16 Jan Micheladding IncludedFeatures tables to projects
2015-10-16 Jan Michelupdating TDC projects with some VHDL changes / new...
2015-09-11 Jan Michelcompiling padiwa project
2015-09-10 Jan Micheladding project for padiwa TDC
2015-08-13 Jan Michelsmall clean-up for backplane master.
2015-08-13 Jan MichelAdding Michaels Flash-tool to template design
2015-08-12 Jan Michelreverting TDC in template - now in tdctemplate
2015-08-12 Jan Michela bit of clean-up
2015-08-10 Jan Michelnew design files with tdc
2015-08-10 Jan MichelHubAddOn seems to work using 4 SFP.
2015-08-10 Jan MichelFirst files for the backplane master
2015-08-07 Jan Michelfixing select outputs for pulser
2015-08-06 Cahitadded TDC to the design
2015-08-06 Cahitadded a template nodelist file for multi-par
2015-08-06 Jan Michelupdating template to latest version
2015-07-14 Jan Michelno drive current for input pins
2015-07-14 Jan Michelupdate to trb3sc_pulser, ADC connection
2015-07-14 Jan Michelsome further features and fixes for the pulser
2015-07-14 Jan Michelcompile-script: adding constraints-only option
2015-07-07 Jan Michela running pulser
2015-07-03 Jan Michelfiles for the pulser addon
2015-07-02 Jan Micheladded files for pulser addon
2015-06-23 Jan Micheladding some IO lines
2015-06-23 Jan Michelfixed reset in reset_handler
2015-06-23 Jan Michelprepared files for hubaddon
2015-06-23 Jan Michelnodelist file is given by compile configuration, no...
2015-06-23 Jan Michelnew lpf for old hub addon
2015-06-23 Jan Michelupdate to TRB3sc files
2015-06-10 Cahitfixed conflict in the compile script
2015-06-10 Cahitmade minor changes in the compile script, added config...
2015-06-05 Jan Michelupdate with nice wrapper for all basic tools such as...
2015-06-05 Jan Micheladded proper clock handler
2015-06-02 Jan Michelremoving copy of ncd file
2015-06-02 Jan Michelsome more initial files for TRB3sc
2015-03-24 Jan Michelfirst lpf and vhd-entity for trb3sc