]> jspc29.x-matter.uni-frankfurt.de Git - trb3.git/shortlog
trb3.git
2021-11-02 Jan Michelfix readback of df35 register (mult logic 0) blackcat deepsea
2021-10-11 Jan Micheltrigger generation: option to use edge detect before...
2021-10-11 Jan Michelupdate 32 pin addon
2021-10-11 Jan Micheladd module to receive R3B white rabbit timestamps to CTS
2021-03-03 Jan Micheltrigger_logic: Extend multiplicity to 3 instances
2021-03-03 Jan MichelRemove TDC from Trb3 CTS
2021-03-03 Jan MichelInclude MDC as option in compile.pl for TDC constraints
2021-03-03 Jan MichelUpdate TDC Project and Config files
2020-10-08 Thomas GesslerECP3 SERDES: Add core for 2.4 Gbps with 240 MHz
2020-07-23 Jan Michelincrease coincidence window and delay from 150 to 630 ns.
2020-07-23 Jan Michelcorrect polarity of JIN inputs
2020-07-23 Jan Micheladd another trigger output to central hub
2020-07-23 Jan Michelextend stretcher option in trigger logic
2020-05-22 Jan Michelupdate compile script
2020-05-09 Jan Michelcorrect non-existent mult registers for channels<=32
2020-05-09 Jan Michelfix handling of non-existing counters on bus
2020-03-16 Jan Micheladd two trigger signal outputs on CLK_RJ3/4
2020-03-16 Jan Michelre-add TRB3 central hub without GbE
2020-03-16 Jan Michelextend multiplicity logic to 64 channels
2019-11-22 Jan Michelupdate ADC AddOn with 200 Mhz on Trb3sc
2019-10-28 Jan Michelupdate CTS for more different pinouts
2019-08-30 Jan MichelMerge branch 'master' of jspc29:trb3
2019-08-30 Jan Michelapply patches by Thomas Geßler - syntax fixes
2019-07-26 Jan Michelremove log file
2019-07-22 Jan MichelUpdate TRB3 central GbE design with trb3tools & new...
2019-04-23 Jan MichelInclude baseline subtraction in the ADC design
2019-04-08 Jan Michelfix a bug in ADC code when switching off PSA
2019-04-08 Jan MichelUpdate sed check with simple edge counter for errors
2019-01-31 Jan MichelADA Addon with extended trigger logic
2019-01-31 Jan Michelupdate 4conn design to new toolchain
2019-01-31 Jan Michelchange trb3_tools for new SPI features
2019-01-31 Jan Michelupdate CTS with mux output option on RJ and new toolchain
2019-01-18 Tobias WeberMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2019-01-18 Tobias Webertrying to implement a reset for the mupix timestamps...
2019-01-16 Jan MichelAdd plattform setting to CTS - different connectors...
2019-01-10 Tobias WeberMerge branch 'feature/mupixspeedregister' into 'master'
2019-01-10 Tobias Weberadding a register to read the mupix clock speed
2018-12-19 Tobias WeberMerge branch 'feature/newheader' into 'master'
2018-12-19 Tobias Weberadding header version and timestamp
2018-12-19 Tobias WeberMerge branch 'GrayAndAddressDecode' into 'master'
2018-12-19 Tobias Weberwrong width for counter decoder.
2018-12-19 Tobias WeberMerge branch 'GrayAndAddressDecode' into 'master'
2018-12-19 Tobias Weberjust a tiny change to the gray converter. Everything...
2018-12-18 Rene Hagdornfixed variable names in DataDecoder
2018-12-18 Rene Hagdornreworked DataDecoder
2018-12-17 Tobias Webermore detailed test of pixel data decoding.
2018-12-13 Tobias Weberthis seems to solve the limitation for large readout...
2018-12-12 Rene Hagdornfixed write enable bug for decoder bypass
2018-12-03 Rene HagdornPixelAddressDecoder and ToT/TS GrayDecoder added to...
2018-11-21 Tobias Weberchanges seem to lead to stable triggers
2018-11-16 Tobias WeberMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2018-11-16 Tobias Webermodify trigger state machine reset
2018-11-14 Tobias Weberthis should fix the multiple hit readout bug.
2018-11-13 Tobias Webertrying to find bugfix for reading same data word severa...
2018-10-31 Jan Michelchange timestamp generator in CTS to allow notiming...
2018-10-24 Jan Michelupdate blank project
2018-10-17 Tobias Webertrying to improve timing with trbnet clock. somewhat...
2018-10-17 Tobias Weberreplacing data width conversion with a data filter...
2018-09-26 Jan Michelupdate compile script for trb5sc
2018-09-26 Jan Michelremove cbmnet from CTS design
2018-09-12 Tobias Webernew version of circular buffer. needs testing in simula...
2018-09-06 Tobias Weberonly put boundary words at beginning and end of conversion.
2018-08-30 Tobias Weberchanges to improve timing. note that the minimal pause...
2018-08-30 Tobias Weberchange size of memory for circullar buffer.
2018-08-30 Tobias Weberchange size of memory for circullar buffer.
2018-08-24 Tobias WeberMerge branch 'master' of jspc29.x-matter.uni-frankfurt...
2018-08-24 Tobias Weberfixing some bugs in hitbus histograms.
2018-08-16 Jan Micheladd some registers to multiplicity logic
2018-08-16 Tobias Weberenable/disable for fifos.
2018-08-15 Tobias Weberfixing bug in serdes monitoring and removing dummy...
2018-08-10 Tobias WeberMerge with faster Link Simulation. Simulation with...
2018-08-10 Jan Michelbetter handling for large number of inputs in input...
2018-08-10 Jan Micheladd edge detect to trigger logic
2018-08-10 Jan MichelUpdata 4conn and gpin TDC designs
2018-08-10 Tobias Weberstart signal for fast pixel configuration. FIFO has...
2018-08-09 Tobias Weberincrease speed of fast slow control to 5 MHz
2018-08-09 Tobias Weberpipe for generator output.
2018-08-09 Tobias Weberreduce fanout of slow control signals.
2018-08-08 Tobias Weberip cores for serdes at 4 different clock speeds.
2018-08-02 Tobias WeberMerge branch 'feature/LinkSimulation'
2018-08-01 Tobias Webermodifications to fast pixel slow control.
2018-07-31 Tobias Webersome more piping.
2018-07-23 Tobias Weberdebugging of mupix unpacker.
2018-07-23 Tobias Weberbetter working version of data width converter in simul...
2018-07-20 Tobias Weberpreliminary version of new data width adjustment for...
2018-07-19 Tobias Weberbecause modelsim wants it
2018-07-19 Tobias Weberreplace block memory in circular buffer with ip from...
2018-07-19 Tobias Weberget rid of some warnings due to unassigned pins.
2018-07-19 Tobias Weberoutput and input pipeline stages for data simulation.
2018-07-19 Tobias WeberMake changes to project file.
2018-07-19 Tobias WeberMoving source files to subfolders.
2018-07-17 Tobias WeberLink gets synchronized on all four channels. Unpacker...
2018-07-17 Tobias Weberslow control reset of counters.
2018-07-17 Tobias Webersome changes and debugging due to link simulation
2018-07-17 Tobias Webertest bench for link simulation.
2018-07-17 Tobias Weberip cores for link simulation.
2018-07-17 Tobias WeberSimulation of Mupix Data Link (current speed 400 Mbit/s).
2018-07-12 Tobias Weberworking version
2018-07-11 Tobias WeberMerge branch 'master' into Mupix8ReadoutRework
2018-07-10 Tobias Weberreadback of mupix 8 shift register.
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