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descriptionThe FPGA-TDC files
last changeWed, 13 Sep 2017 09:13:03 +0000 (11:13 +0200)
shortlog
2017-09-13 Jan MichelStart update of entities and tools in Trb3 TDC designs... master commit | commitdiff | tree | snapshot
2017-09-06 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt... commit | commitdiff | tree | snapshot
2017-08-28 Cahitadded missing files to tdc_v2.3 commit | commitdiff | tree | snapshot
2017-08-08 Jan Michelregister fsm_wr_debug for better timing commit | commitdiff | tree | snapshot
2017-08-08 Jan Micheladded rom_encoder from v2.3 to v2.3.1 commit | commitdiff | tree | snapshot
2017-04-23 Cahitadding Jan s changes commit | commitdiff | tree | snapshot
2017-04-23 CahitMerge branch 'master' of jspc29.x-matter.uni-frankfurt... commit | commitdiff | tree | snapshot
2017-04-23 Cahitadded tdc_v2.3.1 commit | commitdiff | tree | snapshot
2017-01-23 Jan Michelexchanged some channels for better placement in designs... commit | commitdiff | tree | snapshot
2017-01-23 Jan MichelA bit of cleanup in registers commit | commitdiff | tree | snapshot
2016-07-15 Cahitupdated constraints commit | commitdiff | tree | snapshot
2016-06-26 Cahitadded dirich top module commit | commitdiff | tree | snapshot
2016-06-19 Cahitupdated dirich constraints commit | commitdiff | tree | snapshot
2016-04-01 Jan Micheladding missing compile script for TDC commit | commitdiff | tree | snapshot
2016-03-24 Cahitedited top modules for record types commit | commitdiff | tree | snapshot
2016-03-24 Cahitchanged location of enable register for tdc chains... commit | commitdiff | tree | snapshot
...
tags
6 years ago v2.3 Final version of v2.3 tag | commit | shortlog | log
heads
9 months ago heh_dev shortlog | log | tree
16 months ago sep17 shortlog | log | tree
8 years ago master shortlog | log | tree
The FPGA-TDC files