jspc29.x-matter.uni-frankfurt.de Git

description	The FPGA-TDC files
last change	Wed, 13 Sep 2017 09:13:03 +0000 (11:13 +0200)

2017-09-13	Jan Michel	Start update of entities and tools in Trb3 TDC designs... master	commit \| commitdiff \| tree \| snapshot
2017-09-06	Cahit	Merge branch 'master' of jspc29.x-matter.uni-frankfurt...	commit \| commitdiff \| tree \| snapshot
2017-08-28	Cahit	added missing files to tdc_v2.3	commit \| commitdiff \| tree \| snapshot
2017-08-08	Jan Michel	register fsm_wr_debug for better timing	commit \| commitdiff \| tree \| snapshot
2017-08-08	Jan Michel	added rom_encoder from v2.3 to v2.3.1	commit \| commitdiff \| tree \| snapshot
2017-04-23	Cahit	adding Jan s changes	commit \| commitdiff \| tree \| snapshot
2017-04-23	Cahit	Merge branch 'master' of jspc29.x-matter.uni-frankfurt...	commit \| commitdiff \| tree \| snapshot
2017-04-23	Cahit	added tdc_v2.3.1	commit \| commitdiff \| tree \| snapshot
2017-01-23	Jan Michel	exchanged some channels for better placement in designs...	commit \| commitdiff \| tree \| snapshot
2017-01-23	Jan Michel	A bit of cleanup in registers	commit \| commitdiff \| tree \| snapshot
2016-07-15	Cahit	updated constraints	commit \| commitdiff \| tree \| snapshot
2016-06-26	Cahit	added dirich top module	commit \| commitdiff \| tree \| snapshot
2016-06-19	Cahit	updated dirich constraints	commit \| commitdiff \| tree \| snapshot
2016-04-01	Jan Michel	adding missing compile script for TDC	commit \| commitdiff \| tree \| snapshot
2016-03-24	Cahit	edited top modules for record types	commit \| commitdiff \| tree \| snapshot
2016-03-24	Cahit	changed location of enable register for tdc chains...	commit \| commitdiff \| tree \| snapshot
...

6 years ago

The FPGA-TDC files